LTC1955 Linear Technology, LTC1955 Datasheet - Page 6

• Manufacturer Part Number: LTC1955
• Description: Dual Smart Card Interface
• Manufacturer: Linear Technology

PI FU CTIO S
LTC1955
SV
LTC1955.
PV
DV
SGND: Ground. Signal ground for analog sections of the
LTC1955.
PGND: Ground. Power ground for the charge pump. This
pin should be connected directly to a low impedance
ground plane.
CPO: Charge Pump. CPO is the output of the charge pump.
When one or both of the smart cards requires power, the
charge pump will charge CPO to either 3.7V or 5.35V
depending on what smart card voltages are required. A low
impedance 4.7 F X5R or X7R ceramic capacitor is re-
quired on CPO.
C
A 1 F X5R or X7R ceramic capacitor should be connected
from C
DATA: Input/Output. Microcontroller side data I/O pin. The
DATA pin provides the bidirectional communication path
to both smart cards. One, both or neither of the cards may
be selected to communicate via the DATA pin. If several
LTC1955s are connected in parallel, the DATA pin can be
made high impedance by selecting neither card. The C4A
and C8A synchronous card pins can be selected to con-
nect to the DATA pin via the serial port (see Table 4).
R
smart cards. It is level shifted and transmitted directly to
the RST pin of a selected card socket. When a card is
deselected, the RST A/RST B pin for that channel is latched
at its current state.
SYNC: Input. The SYNC pin provides the clock input for
synchronous smart cards. When a synchronous card is
selected, its CLK pin follows SYNC directly. When a
synchronous card is deselected, the CLK A/CLK B pin for
that channel is latched at its current state.
6
+
IN
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, C
BATT
BATT
U
CC
: Input. The R
: Power. Reference voltage for the control logic.
–
: Charge Pump. Charge pump flying capacitor pins.
+
: Power. Supply voltage for analog sections of the
: Power. Supply voltage for the charge pump.
to C
U
–
.
IN
pin supplies the RST signal to both
U
ASYNC: Input. The ASYNC pin provides the clock input for
asynchronous cards and should be connected to a free
running clock. The clock signal to the smart card can be a
nous cards can also be placed in clock stop mode with the
clock stopped either high or low.
D
shifted into D
connected directly to a microcontroller or the D
another LTC1955 for daisy chained operation.
D
data is shifted out of D
can be connected directly to a microcontroller or the D
pin of another LTC1955 for daisy chained operation.
SCLK: Input. The SCLK pin clocks the serial port. Each new
data bit is received on the rising edge of SCLK. SCLK
should be left high during idle times and should not be
clocked when LD is low.
LD: Input. The falling edge of this pin loads the current
state of the shift register into the command register.
Command changes to both smart card channels will be
updated on the falling edge of LD. The rising edge of LD
latches status information from the smart card channels
into the shift register for the next read/write cycle.
NC/NO: Input. This pin controls the activation level of the
PRES A/PRES B pins. When it is high (DV
pins are active high. When it is low (GND), the PRES pins
are active low. When a ground side N.O. switch is used, the
NC/NO pin should be grounded. When a ground side N.C.
switch is used, the NC/NO pin should be connected to
DV
Note: If an N.C. switch is used, a small current (several
microamperes) will flow through the switch whenever a
smart card is not present. For ultralow power consump-
tion in shutdown, an N.O. switch is optimum.
1, 2, 4 or 8 version of the signal on ASYNC. Asynchro-
IN
OUT
CC
: Input. Input for the serial port. Command data is
: Output. Output for the serial port. Smart card status
.
IN
synchronously with SCLK. D
OUT
synchronously with SCLK. D
CC
), the PRES
IN
OUT
sn1955 1955fs
can be
pin of
OUT
IN