LTC2301 Linear Technology Corporation, LTC2301 Datasheet - Page 10

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LTC2301

Manufacturer Part Number
LTC2301
Description
(LTC2301 / LTC2305) 12-Bit ADCs
Manufacturer
Linear Technology Corporation
Datasheet

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LTC2301/LTC2305
PIN FUNCTIONS
(LTC2305)
GND (Pins 1, 4, 9): Ground. All GND pins must be con-
nected to a solid ground plane.
SDA (Pin 2): Bidirectional Serial Data Line of the I
terface. In transmitter mode (Read), the conversion result
is output at the SDA pin, while in receiver mode (Write),
the D
The pin is high impedance during the data input mode and
is an open drain output (requires an appropriate pull-up
device to V
SCL (Pin 3): Serial Clock Pin of the I
LTC2305 can only act as a slave and the SCL pin only ac-
cepts an external serial clock. Data is shifted into the SDA
pin on the rising edges of the SCL clock and output through
the SDA pin on the falling edges of the SCL clock.
CH0-CH1 (Pins 5, 6): Channel 0 and Channel 1 Analog
Inputs. CH0 and CH1 can be confi gured as single-ended
or differential input channels. See the Analog Input Multi-
plexer section.
V
a minimum 2.2μF tantalum capacitor or low ESR ceramic
capacitor. The internal reference may be overdriven by an
external 2.5V reference at this pin.
10
REF
IN
(Pin 7): 2.5V Reference Output. Bypass to GND with
word is input at the SDA pin to confi gure the ADC.
DD
) during the data output mode.
2
C Interface. The
2
C In-
REFCOMP (Pin 8): Reference Buffer Output. Bypass to
GND with a 10μF low ESR ceramic or tantalum and 0.1μF
ceramic capacitor in parallel. Nominal output voltage is
4.096V. The internal reference buffer driving this pin is
disabled by grounding V
overdriven by an external source (see Figure 5c).
V
to 5.25V. Bypass V
10μF low ESR ceramic or tantalum capacitor in parallel.
AD1 (Pin 11): Chip Address Control Pin. This pin is con-
fi gured as a three-state (LOW, HIGH, Floating) address
control bit for the device I
address selection.
AD0 (Pin 12): Chip Address Control Pin. This pin is con-
fi gured as a three-state (LOW, HIGH, Floating) address
control bit for the device I
address selection.
GND (Pin 13 – DFN Package Only): Exposed Pad Ground.
Must be soldered directly to ground plane.
DD
(Pin 10): 5V Analog Supply. The range of V
DD
to GND with a 0.1μF ceramic and a
REF
2
2
, allowing REFCOMP to be
C address. See Table 2 for
C address. See Table 2 for
DD
is 4.75V
23015f

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