LTC3553 Linear Technology Corporation, LTC3553 Datasheet - Page 28

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LTC3553

Manufacturer Part Number
LTC3553
Description
Micropower USB Power Manager
Manufacturer
Linear Technology Corporation
Datasheet

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www.DataSheet.in
LTC3553
the application up and down for housekeeping and other
activities not needing the user’s control.
Power-Down by De-Asserting Both BUCK_ON and
LDO_ON
Figure 11 shows the LTC3553 powering down by μC/μP
control. For this example the pushbutton circuitry starts in
the PON state with a battery connected and both regula-
tors enabled. The user presses the pushbutton (ON low)
for at least 50ms, which generates a debounced, low
impedance pulse on the PBSTAT output. After receiving
the PBSTAT signal, the μC/μP software decides to drive
both the BUCK_ON and LDO_ON inputs low in order to
power down. After the last input goes low, the pushbutton
circuitry will enter the PDN2 state. In the PDN2 state a one
second wait time is initiated after which the pushbutton
circuitry enters the POFF state. During this one second
time, the ON, BUCK_ON and LDO_ON inputs as well as
external power application are ignored to allow all LTC3553
28
OPERATION
STATE
BUCK_ON
LDO_ON
ON (PB)
PBSTAT
BUCK
V
LDO
BAT
BUS
Figure 11. Power-Down via De-Assertion of
BUCK_ON and LDO_ON
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
PON
50ms
μC/μP CONTROL
μC/μP CONTROL
PDN2
1s
3553 TD04
POFF
generated supplies to go low. Though the above assumes
a battery present, the same operation would take place
with a valid external supply (V
tery present.
Holding ON low through the one second power-down
period will not cause a power-up event at end of the one
second period. The ON pin must be brought high following
the power-down event and then go low again to establish
a valid power-up event.
UVLO Minimum Off-Time Timing (Low Battery)
Figure 12 assumes the battery is either missing or at a
voltage below the V
cation is running via external power (V
the external supply causes V
UVLO threshold temporarily. This V
causes the pushbutton circuitry to transition from the PON
state to the PDN2 state. Upon entering the PDN2 state the
regulators power down together.
STATE
BUCK_ON
LDO_ON
ON (PB)
PBSTAT
BUCK
V
LDO
SEQ
BAT
BUS
Figure 12. UVLO Minimum Off-Time Timing
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
PON
PDN2
OUT
UVLO threshold, and the appli-
1s, BUCK POWERS UP
OUT
BUS
LDO POWERS UP
to drop below the V
) with or without a bat-
PUP2
5s
5s
OUT
BUS
UVLO condition
). A glitch on
3553 TD05
PON
OUT
3553f

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