LTC3731 Linear Technology, LTC3731 Datasheet - Page 15

• Manufacturer Part Number: LTC3731
• Description: Synchronous Buck Switching Regulator Controller
• Manufacturer: Linear Technology

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APPLICATIO S I FOR ATIO
where N is the number of output stages, δ is the tempera-
ture dependency of R
resistance (approximately 2Ω at V
drain potential and the change in drain potential in the
particular application. V
typical gate threshold voltage specified in the power
MOSFET data sheet at the specified drain current. C
is the calculated capacitance using the gate charge curve
from the MOSFET data sheet and the technique described
above.
Both MOSFETs have I
equation includes an additional term for transition losses,
which peak at the highest input voltage. For V
high current efficiency generally improves with larger
MOSFETs, while for V
rapidly increase to the point that the use of a higher
R
efficiency. The synchronous MOSFET losses are greatest
at high input voltage when the top switch duty factor is low
or during a short circuit when the synchronous switch is
on close to 100% of the period.
The term (1 + δ ) is generally given for a MOSFET in the
form of a normalized R
δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs.
The Schottky diodes, D1 to D3 shown in Figure 1 conduct
during the dead time between the conduction of the two
large power MOSFETs. This prevents the body diode of the
bottom MOSFET from turning on, storing charge during
the dead time and requiring a reverse recovery period
which could cost as much as several percent in efficiency.
A 2A to 8A Schottky is generally a good compromise for
both regions of operation due to the relatively small
average current. Larger diodes result in additional transi-
tion loss due to their larger junction capacitance.
C
In continuous mode, the source current of each top
N-channel MOSFET is a square wave of duty cycle V
A low ESR input capacitor sized for the maximum RMS
current must be used. The details of a close form equation
IN
DS(ON)
and C
device with lower C
OUT
Selection
U
2
DS(ON)
R losses while the topside N-channel
DS(ON)
IN
TH(IL)
U
> 12V, the transition losses
MILLER
, R
DR
is the data sheet specified
vs temperature curve, but
is the effective top driver
actually provides higher
GS
W
= V
MILLER
IN
), V
U
< 12V, the
OUT
IN
MILLER
is the
/V
IN
.
can be found in Application Note 77. Figure 6 shows the
input capacitor ripple current for different phase configu-
rations with the output voltage fixed and input voltage
varied. The input ripple current is normalized against the
DC output current. The graph can be used in place of
tedious calculations. The minimum input ripple current
can be achieved when the product of phase number and
output voltage, N(V
input voltage V
So the phase number can be chosen to minimize the input
capacitor size for the given input and output voltages.
In the graph of Figure 4, the local maximum input RMS
capacitor currents are reached when:
These worst-case conditions are commonly used for de-
sign because even significant deviations do not offer much
relief. Note that capacitor manufacturer’s ripple current
ratings are often based on only 2000 hours of life. This
makes it advisable to further derate the capacitor or to
choose a capacitor rated at a higher temperature than re-
quired. Several capacitors may also be paralleled to meet
V
V
V
V
OUT
OUT
IN
IN
Figure 6. Normalized Input RMS Ripple Current
vs Duty Factor for One to Six Output Stages
=
=
0.6
0.5
0.4
0.3
0.2
0.1
0
N
2
k
0.1
k
N
–
where k
IN
0.2
1
or:
where k
0.3
DUTY FACTOR (V
OUT
0.4
), is approximately equal to the
= 1 2
1-PHASE
2-PHASE
3-PHASE
4-PHASE
6-PHASE
12-PHASE
0.5
, , ..., –
=
1 2
OUT
0.6
, , ...,
/V
N
IN
0.7
)
1
0.8
N
3731 F06
LTC3731
0.9
15
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