LTC3834 Linear Technology, LTC3834 Datasheet - Page 21

• Manufacturer Part Number: LTC3834
• Description: Synchronous Step-Down Controller
• Manufacturer: Linear Technology

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APPLICATIONS INFORMATION
4. Transition losses apply only to the topside MOSFET, and
Other “hidden” losses such as copper trace and internal
battery resistances can account for an additional 5% to
10% effi ciency degradation in portable systems. It is
very important to include these “system” level losses
during the design phase. The internal battery and fuse
resistance losses can be minimized by making sure that
C
the switching frequency. A 25W supply will typically
require a minimum of 20μF to 40μF of capacitance hav-
ing a maximum of 20mΩ to 50mΩ of ESR. Other losses
including Schottky conduction losses during dead-time
and inductor core losses generally account for less than
2% total additional loss.
Checking Transient Response
The regulator loop response can be checked by looking at
the load current transient response. Switching regulators
take several cycles to respond to a step in DC (resistive)
load current. When a load step occurs, V
amount equal to ΔI
series resistance of C
discharge C
forces the regulator to adapt to the current change and
return V
ery time V
or ringing, which would indicate a stability problem.
OPTI-LOOP compensation allows the transient response
to be optimized over a wide range of output capacitance
and ESR values. The availability of the I
allows optimization of control loop behavior but also pro-
vides a DC coupled and AC fi ltered closed-loop response
IN
a 5V output, or a 4% to 20% loss for a 3.3V output.
Effi ciency varies as the inverse square of V
same external components and output power level. The
combined effects of increasingly lower output voltages
and higher currents required by high performance digital
systems is not doubling but quadrupling the importance
of loss terms in the switching regulator system!
become signifi cant only when operating at high input
voltages (typically 15V or greater). Transition losses
can be estimated from:
has adequate charge storage and very low ESR at
Transition Loss = (1.7) V
OUT
OUT
OUT
to its steady-state value. During this recov-
can be monitored for excessive overshoot
generating the feedback error signal that
LOAD
OUT
(ESR), where ESR is the effective
. ΔI
LOAD
IN
2
also begins to charge or
I
O(MAX)
OUT
TH
C
RSS
pin not only
shifts by an
OUT
f
for the
test point. The DC step, rise time and settling at this test
point truly refl ects the closed-loop response. Assuming a
predominantly second order system, phase margin and/or
damping factor can be estimated using the percentage of
overshoot seen at this pin. The bandwidth can also be
estimated by examining the rise time at the pin. The I
external components shown in the Typical Application
circuit will provide an adequate starting point for most
applications.
The I
loop compensation. The values can be modifi ed slightly
(from 0.5 to 2 times their suggested values) to optimize
transient response once the fi nal PC layout is done and
the particular output capacitor type and value have been
determined. The output capacitors need to be selected
because the various types and values determine the loop
gain and phase. An output current pulse of 20% to 80%
of full-load current having a rise time of 1μs to 10μs will
produce output voltage and I
give a sense of the overall loop stability without break-
ing the feedback loop. Placing a power MOSFET directly
across the output capacitor and driving the gate with an
appropriate signal generator is a practical way to produce
a realistic load step condition. The initial output voltage
step resulting from the step change in output current may
not be within the bandwidth of the feedback loop, so this
signal cannot be used to determine phase margin. This
is why it is better to look at the I
the feedback loop and is the fi ltered and compensated
control loop response. The gain of the loop will be in-
creased by increasing R
will be increased by decreasing C
the same factor that C
will be kept the same, thereby keeping the phase shift the
same in the most critical frequency range of the feedback
loop. The output voltage settling behavior is related to the
stability of the closed-loop system and will demonstrate
the actual overall supply performance.
A second, more severe transient is caused by switching
in loads with large (>1μF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with C
alter its delivery of current quickly enough to prevent this
TH
OUT
series R
, causing a rapid drop in V
C
-C
C
C
fi lter sets the dominant pole-zero
is decreased, the zero frequency
C
and the bandwidth of the loop
TH
TH
pin waveforms that will
C
. If R
pin signal which is in
OUT
. No regulator can
LTC3834
C
is increased by
21
3834fb
TH