FS6054 AMI, FS6054 Datasheet - Page 3
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FS6054
Manufacturer Part Number
FS6054
Description
(FS6050 - FS6054) LOW-SKEW CLOCK FANOUT BUFFER ICs
Manufacturer
AMI
Datasheet
1.FS6054.pdf
(19 pages)
www.DataSheet4U.com
April 1999
3.0
Table 2: Clock Enable
3.1
All outputs are enabled and active upon power-up, and all
output control register bits are initialized to one.
The outputs must be configured at power-up and are not
expected to be configured during normal operation. Inac-
tive outputs are held low and are disabled from switching.
3.1.1
Outputs that are not used in versions of this device with a
reduced pinout are still operational internally. To reduce
power dissipation and crosstalk effects from the unloaded
outputs, it is recommended that these outputs be shut off
via the Control Registers.
CONTROL INPUTS
Programming Information
Power-Up Initialization
Unused Outputs
OE
0
1
CLOCK OUTPUTS (MHz)
SDRAM_0:17
CLK_IN
tristate
3
3.2
A logic-one written to a valid bit location turns on the as-
signed output clock. Likewise, a logic-zero written to a
valid bit location turns off the assigned output clock.
Any unused or reserved register bits should be cleared to
zero.
Serial bits are written to this device in the order shown in
Table 3.
Table 3: Register Summary
SERIAL BIT
10
11
12
13
14
15
16
17
18
19
20
21
22
23
0
1
2
3
4
5
6
7
8
9
Register Programming
SDRAM Control Register 0
SDRAM Control Register 1
SDRAM Control Register 2
DATA BYTE
Byte 0
Byte 1
Byte 2
(MSB)
(MSB)
(MSB)
(LSB)
(LSB)
(LSB)
CLOCK OUTPUT
SDRAM_15
SDRAM_14
SDRAM_13
SDRAM_12
SDRAM_11
SDRAM_10
SDRAM_17
SDRAM_16
SDRAM_7
SDRAM_6
SDRAM_5
SDRAM_4
SDRAM_3
SDRAM_2
SDRAM_1
SDRAM_0
SDRAM_9
SDRAM_8
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
4.5.99