MX25L4005 Macronix International, MX25L4005 Datasheet - Page 2
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MX25L4005
Manufacturer Part Number
MX25L4005
Description
4M-BIT [x 1] CMOS SERIAL FLASH
Manufacturer
Macronix International
Datasheet
1.MX25L4005.pdf
(41 pages)
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GENERAL DESCRIPTION
The MX25L4005 is a CMOS 4,194,304 bit serial Flash
memory, which is configured as 524,288 x 8 internally. The
MX25L4005 feature a serial peripheral interface and soft-
ware protocol allowing operation on a simple 3-wire bus.
The three bus signals are a clock input (SCLK), a serial
data input (SI), and a serial data output (SO). SPI access
to the device is enabled by CS# input.
The MX25L4005 provide sequential read operation on
whole chip.
After program/erase command is issued, auto program/
erase algorithms which program/ erase and verify the
specified page or byte /sector/block locations will be
executed. Program command is executed on page (256
PIN CONFIGURATIONS
8-PIN SOP (150/200mil)
P/N: PM1236
8-LAND SON (6x5mm)
GND
WP#
CS#
SO
1
2
3
4
8
7
6
5
VCC
HOLD#
SCLK
SI
2
bytes) basis, and erase command is executes on chip or
sector(4K-bytes) or block(64K-bytes).
To provide user with ease of interface, a status register is
included to indicate the status of the chip. The status read
command can be issued to detect completion status of a
program or erase operation via WIP bit.
When the device is not in operation and CS# is high, it is
put in standby mode and draws less than 10uA DC current.
The MX25L4005 utilize MXIC's proprietary memory cell,
which reliably stores memory contents even after 100,000
program and erase cycles.
PIN DESCRIPTION
SYMBOL
CS#
SI
SO
SCLK
HOLD#
WP#
VCC
GND
DESCRIPTION
Chip Select
Serial Data Input
Serial Data Output
Clock Input
Hold, to pause the device without
deselecting the device
Write Protection
+ 3.3V Power Supply
Ground
MX25L4005
REV. 1.1, SEP. 30, 2005