cy2ll843 Cypress Semiconductor Corporation., cy2ll843 Datasheet

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cy2ll843

Manufacturer Part Number
cy2ll843
Description
High-drive Two-channel Lvds Repeater/mux Semiconductor
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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Cypress Semiconductor Corporation
Document #: 38-07066 Rev. OBS
Features
Description
The Cypress CY2LL843 are differential line drivers and
receivers that utilize Low Voltage Signaling or LVDS, to
• ANSI TIA/EIA-644-1995-compliant
• Designed for data rates to > 700 Mbs = (350 MHz)
• Single 2 × 2 with high-drive output drivers
• Low -voltage differential signaling with output voltages
• Single 3.3V supply
• Accepts ± 350-mV differential inputs
• Output Drivers are high-impedance when disabled or
• 16-pin SOIC/TSSOP packages
• Industrial version available
of ± 350 mV into 50-ohm load version (Bus LVDS)
when V
1A
1B
2B
2A
DD
Block Diagram
@1.5V
VDD
GND
S0 S1
High-drive Two-Channel LVDS Repeater/Mux
3901 North First Street
1DE
2DE
1Z
1Y
2Y
2Z
achieve signaling rates of 700Mbs. The receiver outputs can
be switched to either or both drivers through the multiplexer
control signals S0/S1. This provides flexibility in application for
either a splitter or router configuration with a single device.
The Cypress CY2LL843 are configured as a single
two-channel repeater/Mux.
voltage of 247 mV into a 50-ohm load and receipt of as little as
100 mV signals with up to 1V of DC offset between transmitter
and receiver. The Cypress CY2LL843 doubles the output drive
current to achieve BusLVDS signaling levels with a faster
rise/fall times into 50-ohm load.
A doubly terminated BusLVDS line enables multipoint config-
urations.
Designed for both point to point based-band multi-point data
transmission over controlled impedance lines.
The LVDS standard provides a minimum differential output
San Jose
GND
1DE
1A
2A
1B
S0
2B
S1
Pin Configuration
1
2
3
4
5
6
7
8
16 pin SOIC/TSSOP
CA 95134
ComLink™ Series
Revised December 02, 2004
16
15
14
13
12
11
10
9
VDD
1Y
1Z
VDD
GND
2DE
2Z
2Y
CY2LL843
408-943-2600

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cy2ll843 Summary of contents

Page 1

... The LVDS standard provides a minimum differential output voltage of 247 mV into a 50-ohm load and receipt of as little as 100 mV signals with offset between transmitter and receiver. The Cypress CY2LL843 doubles the output drive current to achieve BusLVDS signaling levels with a faster rise/fall times into 50-ohm load. ...

Page 2

... V DD Class 3, A: 2KV, B: 500V –65°C to 150°C [3] Description (S0,S1,1DE,2DE) (S0,S1,1DE,2DE) ( see Figure 11,Figure 12, Figure 13) ComLink™ Series CY2LL843 Function Splitter A Splitter B Pass-thru Router Cross Point Router [[2]] + 0.5V Min. Typ. Max. 3 3.3 3.6 2 0.8 0.1 0 2.4 – VDD – 0.8 – ...

Page 3

... 2. 0. 2.4V V Test Conditions Ohm No load f = 100 MHz ohm 100 MHz Both Channels Disabled S0,S1,DE S0,S1,DE Test Conditions –T ) PLH ComLink™ Series CY2LL843 Test Conditions Min. Typ 1.2V –100 CM –0.5 0 0.1 DD Min. Typ. See Figure 11, 247 340 Figures [15]–[19] ...

Page 4

... PRBS-Differential Test Conditions 50% duty cycle tW(50–50) Standard Load Circuit. Splitter O ptions Router O ptions 1A/1B 1Y/1Z Cross Point Router 2A/2B 2Y/2Z 1Y/1Z 1A/1B Pass Thru Router 2Y/2Z 2A/2B Figure 1. Two-channel Cross Point Switch/Mux ComLink™ Series CY2LL843 [[5 4 Min ...

Page 5

... Vdd=3.60V Vdd=3.30V 30.00 Vdd=3.00V 25.00 250 300 350 400 50 Figure 3. Dynamic IDD vs. Frequency 85 C ComLink™ Series CY2LL843 D ynamic IDD C Y 2LL843C VID=0.4, VIC =1.2V S0, S1=01 Temp = 25°C Vdd=3.60V Vdd=3.30V Vdd=3.00V 100 150 200 250 300 350 Fin ( ynam 2LL843C VID =0 ...

Page 6

... Figure 4. VOD vs. Frequency 1.280 1.270 1.260 1.250 220 320 2Y/2Z Figure 5. VOC(ss) vs. Frequency 60.0 40.0 20.0 0.0 300 400 Figure 6. Pulse width vs. Frequency ComLink™ Series CY2LL843 120 220 320 Fre q (MHz 120 220 320 Freq (MHz) 1Y/1Z 2Y/2Z VDD-3.30V, Temp = 25 C 120 220 Freq (MHz) ...

Page 7

... VDD= 3.30V, Temp = 120 Freq (MHz) 1Y/1Z Figure 7. Deterministic Jitter (p-p) vs. Frequency 0.500 0.300 0.100 220 320 Figure 8. TPLH vs. VIC 3.3V, 50 MHz ComLink™ Series CY2LL843 220 320 2Y/2Z VDD=3.30V, Temp = 120 220 Fre q (MHz 320 Page ...

Page 8

... Document #: 38-07066 Rev. OBS Temp = 25°C 1 1.5 VIC Figure 9. TPHL vs. VIC 3.3V, 50 MHz Temp=85°C 100 150 200 250 Freq. (MHz) Figure 10. TPLH-TPHL vs. VIC 3.3V ComLink™ Series CY2LL843 VID 0.400 2 2.5 300 350 400 Page ...

Page 9

... CL = 10pF 1.2V 1.4V 1.0V Voc (ss) [[6],[7],[8],[9]] Figure 14. Test Circuit & Voltage Definitions for the Driver Common-Mode Output Voltage and t R ComLink™ Series CY2LL843 & iff ...

Page 10

... ith tio n +/- +/- i Figure 19. Comparison Standard Drive ‘842 Note: 12. See Figure 19. Voh - Ioh 3 4 Vol - Iol 3 4 ComLink™ Series CY2LL843 [[12 1.2 1.2 1.2 1.2 1.0 1.0 1.0 1.0 0.25 0.5 0.25 0.125 0.45 0.9 0.45 0.225 1 ...

Page 11

... Ordering Information Part Number CY2LL843SI CY2LL843SIT CY2LL843ZI CY2LL843ZIT CY2LL843SC CY2LL843SCT CY2LL843ZC CY2LL843ZCT Package Drawings and Dimensions Document #: 38-07066 Rev. OBS Package Type 16-pin SOIC 16-pin SOIC–Tape and Reel 16-Pin TSSOP 16-pin TSSOP–Tape and Reel 16-pin SOIC 16-pin SOIC–Tape and Reel 16-pin TSSOP 16-pin TSSOP– ...

Page 12

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. (continued) ComLink™ Series CY2LL843 51-85091 Page ...

Page 13

... Document Title: CY2LL843 High-drive Two-Channel LVDS Repeater/Mux Document Number: 38-07066 Issue REV. ECN No. Date ** 116745 08/01/02 *A 122751 12/14/02 OBS 294832 See ECN Document #: 38-07066 Rev. OBS Orig. of Change Description of Change CTK New Data sheet RBI Add power up requirements to operating conditions information RGL To Obsolete the DS ComLink™ ...

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