cy2sstu32866 SpectraLinear Inc, cy2sstu32866 Datasheet - Page 18

• Manufacturer Part Number: cy2sstu32866
• Description: 1.8v, 25-bit 1 1 Or 14-bit 1 2 Jedec-compliant Data Register With Parity
• Manufacturer: SpectraLinear Inc

Rev 1.0, November 25, 2006
DC Electrical Specifications
AC Timing Specifications
I
C
F
T
T
T
T
T
T
T
T
Notes:
DDD
4. Data and V
5. Data, V
Parameter
ACT
CLK
W
INACT
SU
H
PDM
PDMSS
PD
IN
Parameter
[4]
[5]
REF
REF
and clock inputs must be held at valid levels (not floating) a minimum time of T
Power Supply Current
Dynamic Operating Clock
Only
Dynamic Operating per
each Data Input
Low Power Active Mode,
CLK only
Low Power Active Mode
per each Data Input
Ci (Data and CSR#)
Ci (CK and CK#)
Ci (RESET#)
inputs must be low a minimum time of T
Clock Frequency
Pulse Duration
Differential Input Active time
Differential Input Inactive time
Set-up Time
Hold Time
Propagation Delay single bit switching
Propagation Delay simultaneous
switching
Propagation Delay from Low to High
Description
Description
(continued)
RESET# = V
CK# switching 50% duty cycle,
V
RESET# = V
CK# switching 50% duty cycle,
V
RESET# = V
CK# switching 50% duty cycle,
V
RESET# = V
CK# switching 50% duty cycle,
V
RESET# = V
CK# switching 50% duty cycle,
V
CS Enabled
RESET# = V
CK# switching 50% duty cycle,
V
CS Enabled
V
V
V
DD
DD
DD
DD
DD
DD
I
IX
I
= V
= V
= 0.9V, V
ACT
= 1.8V, 1 IO switching 1:1 configuration,
= 1.8V, 1 IO switching 1:2 configuration;
= 1.8V
= 1.8V, 1 IO switching 1:1 configuration
= 1.8V, 1 IO switching 1:2 configuration
= 1.8V, CS Enabled
DD
REF
max, after RESET# is taken HIGH.
or GND
± 250mV
DD
DD
DD
DD
DD
DD
ID
= 600 mV
, V
, V
, V
, V
, V
, V
Conditions
I
I
I
I
I
I
= V
= V
= V
= V
= V
= V
DSR# before crossing CK,CK#,
CK, CK# H or L
CSR = H
CSR# before crossing CK,CK#,
DCS = H
DCS# before crossing CK,CK#,
CSR = L
DODT, DCKE and data before
crossing CK,CK#, CK going
HIGH
PAR_IN after crossing CK,CK#
DCS#, DODT, DCKE and data
after crossing CK, CK#
PAR_IN after crossing CK, CK#
From CK, CK# crossing to Q
From CK, CK# to Q -
simultaneous switching
From CK, CK# crossing to PPO
IH(AC)
IH(AC)
IH(AC)
IH(AC)
IH(AC)
IH(AC)
or V
or V
or V
or V
or V
or V
Conditions
INACT
IL(AC)
IL(AC)
IL(AC)
IL(AC)
IL(AC)
IL(AC)
max after RESET# is taken LOW.
, CK,
, CK,
, CK,
, CK,
, CK,
, CK,
Min.
2.5
2
CY2SSTU32866
28 (typical)
18 (typical)
36 (typical)
27 (typical)
2 (typical)
2 (typical)
Min.
0.7
0.7
0.5
0.5
0.5
0.5
0.5
2.15 (typical)
–
1
–
–
2.5
Max.
3.5
Max.
3
1.86
1.87
500
10
15
–
–
–
–
–
–
–
Page 18 of 24
μA/MHz
μA/MHz
μA/MHz
μA/MHz
μA/MHz
μA/MHz
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
pF
pF
pF