cy29772 Cypress Semiconductor Corporation., cy29772 Datasheet - Page 6

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cy29772

Manufacturer Part Number
cy29772
Description
2.5v Or 3.3v, 200-mhz, 12-output Zero Delay Buffer
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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Document #: 38-07572 Rev. *A
AC Electrical Specifications
f
f
f
f
t
f
f
DC
t
t
t
t
t
t
BW
Note:
VCO
XTAL
in
refDC
r
MAX
SCLK
r
(φ)
sk(O)
sk(B)
PLZ, HZ
PZL, ZH
6. AC characteristics apply for parallel output termination of 50Ω to V
, t
, t
Parameter
f
f
by characterization and are not 100% tested.
VCO Frequency
Crystal Frequency Range
Input Frequency
Input Duty Cycle
TCLK Input Rise/FallTime
Maximum Output Frequency
Serial Clock Frequency
Output Duty Cycle
Output Rise/Fall times
Propagation Delay
(static phase offset)
Output-to-Output Skew
Bank-to-Bank Skew
Output Disable Time
Output Enable Time
PLL Closed Loop Bandwidth
(–3 dB)
Description
(V
DD
= 2.5V ± 5%, T
See Table 7
÷4 Feedback
÷6 Feedback
÷8 Feedback
÷10 Feedback
÷12 Feedback
÷16 Feedback
÷20 Feedback
÷24 Feedback
÷32 Feedback
÷40 Feedback
Bypass mode (PLL_EN = 0)
0.7V to 1.7V
÷2 Output
÷4 Output
÷6 Output
÷8 Output
÷10 Output
÷12 Output
÷16 Output
÷20 Output
÷24 Output
f
f
0.6V to 1.8V
TCLK to FB_IN
Skew within Bank A
Skew within Bank B
Skew within Bank C
÷4 Feedback
÷6 Feedback
÷8 Feedback
÷10 Feedback
÷12 Feedback
÷16 Feedback
÷20 Feedback
MAX
MAX
TT
. Outputs are at same supply voltage unless otherwise stated. Parameters are guaranteed
A
< 100 MHz
> 100 MHz
= –40°C to +85°C)
Condition
[6]
–125
Min.
33.3
16.6
12.5
6.25
33.3
16.6
12.5
47.5
200
100
8.3
8.3
0.1
10
50
25
20
10
25
50
25
20
10
45
5
0
1.3–2.0
0.7–1.3
0.9–1.3
0.6–1.1
0.6–0.9
0.4–0.6
0.6–0.9
Typ.
23.75
23.75
Max.
63.3
47.5
31.6
15.8
63.3
47.5
31.6
52.5
11.8
15.8
380
200
190
100
150
400
125
9.5
1.0
1.0
25
95
38
19
75
95
38
19
20
55
75
10
10
CY29772
Page 6 of 12
MHz
MHz
MHz
MHz
MHz
MHz
Unit
ns
ns
ps
ps
ns
ns
%
%
ps
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