cy25561 Cypress Semiconductor Corporation., cy25561 Datasheet
cy25561
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cy25561 Summary of contents
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... PD CP Filter FEEDBACK vco DIVIDER DIVIDER & MUX VDD 20K 20K VSS 7 S0 • 3901 North First Street • CY25561 1 8 XIN/CLK XOUT VDD CY25561 VSS 4 5 SSCC SSCLK 4 SSCLK San Jose, CA 95134 • 408-943-2600 Revised October 16, 2002 [+] Feedback ...
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... This reduction in radiated energy can significantly reduce the cost of complying with regulatory requirements and time to market without degrading the system performance. The CY25561 is a very simple and versatile device to use. The frequency and spread % range is selected by programming S0 and S1 digital inputs. These inputs use three (3) logic states including High (H), Low (L), and Middle (M) logic levels to Table 1 ...
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... Document #: 38-07242 Rev. *B “1” (One). Each of these states has a defined voltage range that is interpreted by the CY25561 as a “0,” “M,” or “1” logic state. Refer to Table 2 for voltage ranges for each logic state. The CY25561 has two equal value resistors connected inter- nally to pin 6 and pin 7 that produce the default “ ...
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... Cdiv, determine the Modulation Rate. In some SSCG clock generators, the selected range determines the internal divider count. In other SSCG clocks, the internal divider count is fixed over the operating range of the part. The CY25561 has a fixed divider count, as listed below. Cdiv 2332 ...
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... S0 VSS 3 Figure 3. Application Schematic of the CY25561. Programming a logic “0” state is as simple as connecting to logic ground, as shown on pin 7 above. With this configuration, the CY25561 will produce an SSCG clock that center frequency of 90 MHz. Referring to Table 2, range “M, 0” MHz will generate a modulation profile that has a 3 ...
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... DD L Conditions V = 3.3V DD SSCLK1 @ 0.4–2.4V SSCLK1 @ 0.4–2.4V XIN/CLK (Pin 1) SSCLK1 (Pin 4) 50–100MHz, ( 100–166MHz, ( Package Type Commercial Commercial CY25561 Typ. Max. Unit 3.3 3. 0.50V 0.60V V DD ...
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... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 8-lead (150-Mil) SOIC S8 CY25561 51-85066-A Page ...
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... Document History Page Document Title: CY25561 Spread Spectrum Clock Generator Document Number: 38-07242 Issue Rev. ECN No. Date ** 115369 07/05/02 *A 119443 10/17/02 *B 122694 12/27/02 Document #: 38-07242 Rev. *B Orig. of Description of Change Change OXC New Data Sheet RGL Corrected the values in the Absolute Maximum Ratings to match the device. ...