cy23020-3 Cypress Semiconductor Corporation., cy23020-3 Datasheet
cy23020-3
Related parts for cy23020-3
cy23020-3 Summary of contents
Page 1
... Additionally, the CY23020-3 can be used as a fan-out buffer via the S[1:2] control pins. In this mode, the PLL is bypassed and the reference clock is routed to the output buffers. ...
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... Frequency Range Selection Input. To determine the correct connection for this pin, refer to Table 2. This should be a static input LOCK 43 O PLL Locked Output. When this output is HIGH, the PLL in the CY23020 steady state operation mode (Locked). When this signal is LOW, the PLL is in the process of locking onto the reference signal. S1:2 16 Output/PLL Enable Selection Bits ...
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... V = 3.135 CC Conditions Min. Max. 1.835 2.435 1.135 1.735 –1.3 –0.7 –2 –1.4 [4] 1.485 2.085 –1.65 –1.05 is not necessarily equal to the differential crossover voltage, MID CY23020-3 C Zero Delay ASIC/ Buffer Buffer A B Rating Unit °C °C ° 3 3.465 CC CC Min ...
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... Input duty cycle Differential crossing point External feedback REF, FB same frequency External feedback REF, FB same frequency x2 Output-Output skew within a bank Output-Output skew @133 MHz REF and outputs, same frequency REF and outputs, same frequency Ref = x2 Ref = x2 CY23020 3 3.465 CC CC Min. Max. Min. ...
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... C L Document #: 38-07473 Rev. *A All board transmission lines 50 and 0.57 ns propagation delay REFIN - OUT = FBIN - REF - + REFIN+ OUT FBIN+ REF+ FBOUT FBOUT - Figure 2. Test Set-up 1 Example CY23020-3 50 PULSE GEN 50 C Selected to produce 1 - 2.5V/ns at pin 100 100 Page [+] Feedback ...
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... Document #: 38-07473 Rev. *A All board transmission lines 50 and 0.57ns propagation delay . REFIN- OUT 450 = FBIN- REF- + 100 REFIN+ OUT 450 FBIN+ REF+ FBOUT+ Q5+ FBOUT- Q5- Q1+ Q4+ Q1- Q4- [9] Figure 3. Test Set-up 2 Example CY23020-3 50 PULSE GEN 50 C Selected to produce 1-2.5V/ns at pin 100 100 Page [+] Feedback ...
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... REFIN+ OUT FBIN+ REF+ FBOUT FBOUT - [10] Figure 4. Test Set-up 3 Example Package Type CY23020-3 50 PULSE GEN 50 C Selected to produce 1-2.5V/ns at pin 100 100 Temperature Range Industrial, –40°C to +85°C Industrial, –40°C to +85°C Page [+] Feedback ...
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... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 48-lead QFN (7 × 7 mm) LF48 CY23020-3 51-85152-*A Page ...
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... Document History Page Document Title: CY23020-3 10-output, 400-MHz LVPECL Zero Delay Buffer Document Number: 38-07473 Issue REV. ECN NO. Date ** 118965 11/05/02 *A 126939 06/10/03 Document #: 38-07473 Rev. *A Orig. of Change Description of Change HWT New Data Sheet RGL Fixed the block diagram (removed the C1 input) CY23020-3 ...