ds2154lnd2 Maxim Integrated Products, Inc., ds2154lnd2 Datasheet - Page 63

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ds2154lnd2

Manufacturer Part Number
ds2154lnd2
Description
Ds2154 Enhanced E1 Single Chip Transceiver
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
13 LINE INTERFACE FUNCTION
The line interface function in the DS2152 contains three sections: the receiver, which handles clock and
data recovery; the transmitter, which waveshapes and drives the E1 line; and the jitter attenuator. Each of
these three sections is controlled by the Line Interface Control Register (LICR), which is described
below.
LICR: LINE INTERFACE CONTROL REGISTER (Address = 18 Hex)
(MSB)
SYMBOL
L2
JABDS
EGL
DJA
TPD
JAS
L2
L1
L0
L1
POSITION
LICR.7
LICR.6
LICR.5
LICR.4
LICR.3
LICR.2
LICR.1
LICR.0
L0
EGL
NAME AND DESCRIPTION
Line Build-Out Select Bit 2. Sets the transmitter build out; see
the
Line Build-Out Select Bit 1. Sets the transmitter build out; see
the
Line Build-Out Select Bit 0. Sets the transmitter build out; see
the
Receive Equalizer Gain Limit.
0 = -12dB
1 = -43dB
Jitter Attenuator Select.
0 = place the jitter attenuator on the receive side
1 = place the jitter attenuator on the transmit side
Jitter Attenuator Buffer Depth Select
0 = 128 bits
1 = 32 bits (use for delay sensitive applications)
Disable Jitter Attenuator.
0 = jitter attenuator enabled
1 = jitter attenuator disabled
Transmit Power-Down.
0 = normal transmitter operation
1 = powers down the transmitter and tri-states the TTIP and
TRING pins
Table
Table
Table
13-2.
13-2.
13-2.
63 of 87
JAS
JABDS
DJA
(LSB)
TPD
LICR

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