ds1863 Maxim Integrated Products, Inc., ds1863 Datasheet - Page 47

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ds1863

Manufacturer Part Number
ds1863
Description
Ds1863 Burst-mode Pon Controller With Integrated Monitoring
Manufacturer
Maxim Integrated Products, Inc.
Datasheet

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Table 02h, Register 89h: Config
FACTORY DEFAULT
READ ACCESS
WRITE ACCESS
MEMORY TYPE
Configure the memory location and the polarity of the digital outputs.
Table 02h, Register 8Ah: Startup Step
FACTORY DEFAULT:
READ ACCESS
WRITE ACCESS
MEMORY TYPE:
This value will define the maximum allowed step for the upper 8 bits of IBIAS output during start-up.
8Ah
89h
FE TG D IR
bit3:0
bit7
bit6
bit5
bit4
bit7
bit7
2
12
FETG DIR: Chooses the direction or polarity of the FETG output for normal operation.
0 = Under normal operation, FETG will be pulled low. (Default)
1 = Under normal operation, FETG will be pulled high.
TX-F EN:
0 = The alarm bits will immediately reflect the status of the last comparison. (Default)
1 = The alarm bits are latched until cleared by a TX-D transition or Power-down. If V
enabled for either FETG or TX-F then latching is disabled until after the first V
made above the V
RESERVED
ASEL: Address SELect.
0 = Device Address of A2h (Default).
1 = Device-Address is equal to the value found in byte ‘device_address’ (Table 02h, 8Ch).
RESERVED
TX - F E N
00h
PW2
PW2
00h
PW2
PW2
2
Nonvolatile (SEE)
Nonvolatile (SEE)
11
____________________________________________________________________
RE S E RV E D
CC
2
10
to set-point to allow for proper operation during slow power-on cycles.
Burst-Mode PON Controller
With Integrated Monitoring
AS E L
2
9
RE S E RV E D
2
8
RE S E RV E D
2
7
RE S E RV E D
2
6
CC
measurement is
CC
low alarm is
RE S E RV E D
bit0
bit0
2
5
47

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