ds1073-special Maxim Integrated Products, Inc., ds1073-special Datasheet
ds1073-special
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ds1073-special Summary of contents
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... Contact the factory for availability of specific frequencies. In general, any frequency possible on a standard DS1073 can be made available. The DS1073 special is available in 8-pin DIP or SOIC packages, allowing the generation of a clock signal easily, economically and using minimal board area. DS1073 Special ...
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BLOCK DIAGRAM Figure 1 Power Down Control PDN Master Oscillator 60-100MHz Prescaler Divide Divider Divide by N 1-513 OUT0 (Optional) (Reference) OUT1 OE ...
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... Use this form for DS1073 Special programmed EconOscillators . All sections must be completed. Refer to the datasheet or contact the factory at (972) 371-6822 for assistance. Parent Part Number: Customer Name: _______________________________________________________________ Customer Contact: _____________________________________________________________ Customer Address: _____________________________________________________________ _____________________________________________________________________________ Customer Phone: (Area) _____ _____ Salesman: ____________________________________________________________________ ...
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... PIN DESCRIPTIONS Output Pin (OUT1 pin): This pin is the main oscillator output. Output Enable Function (OE pin): The DS1073 Special features a “synchronous” output enable. When high logic level the oscillator free runs. When this pin is taken low OUT1 is held low, immediately if OUT1 is already low the next high-to-low transition if OUT1 is high ...
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Figure 2 Disable Timing If OE goes low while OUT1 is high, the output will be disabled on the completion of the output pulse. If OUT1 is low, the disabling behavior will be dependent on the setup time between the ...
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POWER-DOWN CONTROL POWER-DOWN If PDN is taken low a power-down sequence is initiated. The “Enabling Sequencer” is used to execute events in the following sequence: 1. Disable OUT1 (same sequence as when OE is used) and reset N counters. 2. ...
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POWER-ON RESET When power is initially applied to the device supply pin, a power-on reset sequence is executed, similar to that which occurs when the device is restored from a power-down condition. This sequence comprises two stages, first a conventional ...
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... Low-level Input Voltage High-level Input Current ( OE) PDN , Low-level Input Current ( OE) PDN , Supply Current (Active) DS1073-100 DS1073-80 DS1073-66 DS1073-60 Standby Current (power-down) -1.0V to +7.0V 0 ° ° C -55 ° +125 ° C See J-STD-020A Specification (T = 0°C to +70° SYMBOL CONDITION V CC ...
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AC ELECTRICAL CHARACTERISTICS PARAMETER Output Frequency Accuracy Combined Freq. Variation Long Term Stability Minimum Output Frequency Power-Up Time Enable OUT1 from PDN ↑ Enable OUT0 from PDN ↑ OUT1 Hi-Z from PDN ↓ OUT0 Hi-Z from PDN ↓ Load Capacitance ...
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AC ELECTRICAL CHARACTERISTICS – CALCULATED PARAMETERS The following characteristics are derived from various device operating parameters (frequency, mode etc.). They are not specifically tested or guaranteed and may differ from the min and max limits shown by a small amount ...
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... Low-level Output Voltage (OUT1, OUT0) High-level Input Voltage Low-level Input Voltage High-level Input Current ( OE) PDN , Low-level Input Current( OE) PDN , Supply Current (Active) DS1073-100 DS1073-80 DS1073-66 DS1073-60 Standby Current (power-down) (TA = -40°C to +85°C) (Vcc =2.7V to 3.6V) SYMBOL CONDITION mA MIN CC ...
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AC ELECTRICAL CHARACTERISTICS PARAMETER Output Frequency Accuracy Combined Freq. Variation Long Term Stability Minimum Output Frequency Power-Up Time Enable OUT from PDN ↑ Enable OUT0 from PDN ↑ OUT Hi-Z from PDN ↓ OUT0 Hi-Z from PDN ↓ Load Capacitance ...