rs5c338a RICOH Co.,Ltd., rs5c338a Datasheet - Page 18

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rs5c338a

Manufacturer Part Number
rs5c338a
Description
3-wire Serial Interface Real-time Clock Ics With Voltage Monitoring Function
Manufacturer
RICOH Co.,Ltd.
Datasheet

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18
RS5C338A
2.5-3 Year Counter (at Address 6h)
2.6 Oscillation Adjustment Register (at Address 7h)
2.6-1 (0) Bit
The (0) bit should be set to 0 to allow writing to the oscillation adjustment register. The (0) bit will be set to 0 when
the XSTP bit is set to 1 in the control register 2.
2.6-2 F
The oscillation adjustment circuit is configured to change time counts of 1 second on the basis of the settings of the
oscillation adjustment register when the second digits read 00, 20, or 40 seconds. Normally, the second counter is
incremented once per 32768 32.768-kHz clock pulses generated by the crystal oscillator. Writing to the F
activates the oscillation adjustment circuit.
· The oscillation adjustment circuit will not operate with the same timing (00, 20, or 40 seconds) as the timing of
· The F
Example:
When the second digits read 00, 20, or 40, the settings of “0, 0, 0, 0, 1, 1, 1” in the F
cause an increment of the current time counts of 32768 by (7–1) × 2 to 32780 (a current time count loss). When the
second digits read 00, 20, or 40, the settings of “0, 0, 0, 0, 0, 0, 1” in the F
an increment nor a decrement of the current time counts of 32768.
When the second digits read 00, 20, or 40, the settings of “1, 1, 1, 1, 1, 1, 0” in the F
cause a decrement of the current time counts of 32768 by (–2) × 2 to 32764 (a current time count gain).
Indefinite
writing to the oscillation adjustment register.
The F
The settings of “
cause neither an increment nor decrement of time counts.
*
*
) Default settings: Default value means read/written values when the XSTP bit is set to “1” due to power-on from 0 volts or supply voltage drop.
) Default settings: Default value means read/written values when the XSTP bit is set to “1” due to power-on from 0 volts or supply voltage drop.
D7
D7
Y
Y
(0)
(0)
0
80
80
6
6
6
bit setting of 0 causes an increment of time counts by ((F
bit setting of 1 causes a decrement of time counts by (( F
to F
Indefinite
0
D6
Y
Y
D6
F
F
0
40
40
6
6
*
, 0, 0, 0, 0, 0,
Indefinite
D5
Y
Y
D5
F
F
0
20
20
5
5
*
” ( “
Indefinite
D4
D4
Y
Y
F
F
0
*
10
10
4
4
” representing either “0” or “1” ) in the F
Indefinite
D3
D3
Y
Y
F
F
0
8
8
3
3
Indefinite
D2
D2
Y
Y
F
F
0
4
4
2
2
5
5
, F
, F
4
4
, F
, F
Indefinite
6
3
3
, F
, F
, F
D1
D1
Y
Y
F
F
0
5
1
1
2
2
2
2
, F
, F
, F
4
1
, F
1
, F
, F
3
Indefinite
0
, F
0
) –1) × 2.
) +1) × 2.
6
6
6
, F
D0
D0
2
, F
, F
Y
Y
F
F
, F
0
1
1
0
0
5
5
5
, F
1
, F
, F
, and F
4
4
4
, F
, F
, F
(For writing)
(For reading)
Default settings*
(For writing)
(For reading)
Default settings*
3
3
3
, F
, F
, F
0
bits cause neither
2
2
2
, F
, F
, F
1
1
1
, and F
, and F
, and F
6
to F
0
0
0
0
bits
bits
bits
bits

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