mrf89xa Microchip Technology Inc., mrf89xa Datasheet - Page 34
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mrf89xa
Manufacturer Part Number
mrf89xa
Description
Ultra-low Power, Integrated Ism Band Sub-ghz Transceiver
Manufacturer
Microchip Technology Inc.
Datasheet
1.MRF89XA.pdf
(142 pages)
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2.14.3
REGISTER 2-3:
2.14.4
REGISTER 2-4:
DS70622B-page 34
MRF89XA
bit 7
R = Readable bit
-n = Value at POR
r = Reserved
bit 7-0
bit 7
R = Readable bit
-n = Value at POR
r = Reserved
bit 7
bit 6-0
R/W-0
—
r
FREQUENCY DEVIATION
CONTROL REGISTER DETAILS
BIT RATE SET REGISTER DETAILS
FDVAL<7:0>: Frequency Deviation Value bits
The bits indicate single side frequency deviation (in bit value) in FSK Transmit mode.
FDVAL = 00000011 ≥ f
f
Where, FDVAL is the value in the register and has the range from 0 ≤ FDVAL ≤ 255. Refer to
Section 3.3.3 “fdev Setting in FSK Mode” and Section 3.3.4 “fdev Setting in OOK Mode” for
details on the f
Reserved: Reserved bit; do not use
0 = Reserved (default)
BRVAL<6:0>: Bit Rate Value bits
These bits set the bit rate (in bit value) of: Bit Rate = [ f
BRVAL<6:0> = 0000111 ≥ Bit Rate = 25 kbps NRZ (default)
Where, BRVAL is the value in the register and has the range from 0 ≤ BRVAL ≤ 127
dev
R/W-0
R/W-0
= f
xtal
FDEVREG: FREQUENCY DEVIATION CONTROL REGISTER
(ADDRESS:0X02) (POR:0X03)
BRSREG: BIT RATE SET REGISTER (ADDRESS:0x03) (POR:0x07)
/32 * (FDVAL + 1)
dev
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
setting for FSK and OOK modes.
R/W-0
R/W-0
dev
= 100 kHz (default)
R/W-0
R/W-0
Preliminary
FDVAL<7:0>
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
BRVAL<6:0>
R/W-0
R/W-0
xtal
/64 * (BRVAL + 1) ]
R/W-0
R/W-1
© 2010 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
R/W-1
R/W-1
R/W-1
R/W-1
bit 0
bit 0