mrf89xa Microchip Technology Inc., mrf89xa Datasheet - Page 35

• Manufacturer Part Number: mrf89xa
• Description: Ultra-low Power, Integrated Ism Band Sub-ghz Transceiver
• Manufacturer: Microchip Technology Inc.

2.14.5
REGISTER 2-5:
2.14.6
REGISTER 2-6:
© 2010 Microchip Technology Inc.
bit 7
R = Readable bit
-n = Value at POR
r = Reserved
bit 7-0
bit 7
R = Readable bit
-n = Value at POR
r = Reserved
bit 7-6
bit 5-0
R/W-0
R/W-0
FSIZE<1:0>
FLOOR THRESHOLD CONTROL
REGISTER DETAILS
FIFO CONFIGURATION REGISTER
DETAILS
FTOVAL<7:0>: Floor Threshold OOK Value bits
The bits indicate Floor threshold in OOK receive mode.
FTOVAL<7:0> = 00001100 ≥ 6 dB (default)
FTOVAL assumes 0.5 dB RSSI Step
FSIZE<1:0>: FIFO Size Selection bits
These bits set the size/number of FIFO locations.
11 = 64 bytes
10 = 48 bytes
01 = 32 bytes
00 = 16 bytes (default)
FTINT<5:0>: FIFO Threshold Interrupt bits
Setting these bits selects the FIFO threshold for interrupt source. Refer to Section 3.6.2 “Interrupt
Sources and Flags” for additional information.
FTINT<5:0> = 001111 (default)
FIFO_THRESHOLD interrupt source’s behavior depends on the running mode (TX, RX or Stand-by
mode).
R/W-0
R/W-0
FLTHREG: FLOOR THRESHOLD CONTROL REGISTER
(ADDRESS:0x04) (POR:0x0C)
FIFOCREG: FIFO CONFIGURATION REGISTER (ADDRESS:0x05) (POR:0x0F)
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
R/W-0
R/W-0
Preliminary
FTOVAL<7:0>
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-1
R/W-1
FTINT<5:0>
R/W-1
R/W-1
x = Bit is unknown
x = Bit is unknown
MRF89XA
R/W-0
R/W-1
DS70622B-page 35
R/W-0
R/W-1
bit 0
bit 0