74LVC377D,118 NXP Semiconductors, 74LVC377D,118 Datasheet - Page 9

• Manufacturer Part Number: 74LVC377D,118
• Description: IC OCT D FF POS-EDG TRIG 20SOIC
• Manufacturer: NXP Semiconductors
• Series: 74LVCr
• Type: D-Type Busr

Specifications of 74LVC377D,118

• Function: Standard
• Output Type: Non-Inverted
• Number Of Elements: 1
• Number Of Bits Per Element: 8
• Frequency - Clock: 150MHz
• Delay Time - Propagation: 1.5ns
• Trigger Type: Positive Edge
• Current - Output High, Low: 24mA, 24mA
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (7.5mm Width)
• Logic Family: LVC
• Technology: CMOS
• Number Of Bits: 8
• Number Of Elements: 1
• Clock-edge Trigger Type: Positive-Edge
• Polarity: Non-Inverting
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Package Type: SO
• Propagation Delay Time: 10ns
• Low Level Output Current: 24mA
• High Level Output Current: -24mA
• Frequency (max): 100MHz
• Operating Supply Voltage (min): 1.2V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 74LVC377D-T; 74LVC377D-T; 935210660118

Philips Semiconductors
12. Waveforms
9397 750 14589
Product data sheet
Table 9:
Supply voltage
V
1.2 V
2.7 V
3.0 V to 3.6 V
Fig 4. Propagation delay clock (CP) to output (Qn), pulse width clock (CP) and maximum
Fig 5. Data set-up and hold times of data input (Dn) and enable input (E) and pulse width
CC
Measurement points are given in
Logic levels: V
clock pulse frequency
Measurement points are given in
The shaded areas indicate when the input is permitted to change for predictable output
performance.
of enable input (E)
Measurement points
CP input
Dn input
E input
Qn output
CP input
OL
Rev. 05 — 21 February 2005
GND
GND
GND
and V
GND
V
V
V
V
V
CC
CC
CC
OH
OL
V
Octal D-type flip-flop with data enable; positive-edge trigger
I
OH
are typical output voltage drop that occur with the output load.
Input
V
0.5
1.5 V
1.5 V
M
V
V
V
Table
M
Table
V
M
M
t
CC
t
su
t
PHL
su
t
W
9.
9.
1/f
V
t
V
h
M
M
max
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
t
W
t
Output
V
0.5
1.5 V
1.5 V
PLH
M
t
su
V
CC
74LVC377
mna894
t
h
mna921
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