st2064b Sitronix Technology Corporation, st2064b Datasheet - Page 30

• Manufacturer Part Number: st2064b
• Description: 8 Bit Microcontroller With 64k Bytes Rom
• Manufacturer: Sitronix Technology Corporation

1
14.1 Function description
A built-in PWM DAC is for analog sampling data or voice
signals. The structure of DAC is shown in TABLE 14-1.
There is an interrupt signal from DAC to CPU whenever
Ver. 3.0
1
Address Name R/W
Address Name R/W
Address Name R/W
4
4
$012
$013
$014
$016
$014
$016
.
Note: For Single-Pin Single Ended mode, the effective output resolution is 7 bit.
Note: In DAC mode, PSGCK must select SYSCK x 2 (PCK[2~0]=100) under RC=2MHz.
.
Bit 7~0:
Bit 0:
Bit 1:
Bit 3~2: DMD[1~0] : DAC output mode selection
Bit 6~4: PCK[2~0] : PSGCK selection for PSG and DAC
P
P
W
W
PSG1L
PSG1H
DAC
PSGC
DAC
PSGC
M
M
DACE : PSG play as Tone (Noise) or DAC Generator selection bit
INH : DAC output inhibit control bit
1 = PSG is used as DAC Generator
0 = PSG is used as Tone (Noise) Generator
1 = DAC output inhibit
0 = DAC output enable
00 = Single-Pin mode
01 = Two-Pin Two Ended mode
10 = Reserved
11 = Two-Pin Push Pull mode
000 = SYSCK
X01 = SYSCK / 2
X10 = SYSCK / 4
011 = SYSCK / 8
100 = SYSCK x 2 (= frequency of RC oscillator)
DAC[7~0] : DAC output data
D
D
A
A
W
W
W
W
W
C
C
W
W
W
PSG1[7] PSG1[6] PSG1[5] PSG1[4] PSG1[3] PSG1[2] PSG1[1] PSG1[0] 0 0 0 0 0 0 0 0
DAC[7]
Bit 7
DAC[7]
Bit 7
Bit 7
-
-
-
-
-
DAC[6]
PCK[2]
PCK[2]
Bit 6
TABLE 14-3 DAC Control Register (PSGC)
DAC[6]
PCK[2]
PCK[2]
TABLE 14-1 Summary Of DAC Registers
Bit 6
Bit 6
-
TABLE 14-2 DAC Data Register (DAC)
DAC[5]
PCK[1]
PCK[1]
Bit 5
: 8 bit resolution
: 7 bit resolution
: 8 bit resolution
DAC[5]
PCK[1]
PCK[1]
Bit 5
Bit 5
-
DAC[4]
PCK[0]
PCK[0]
Bit 4
DAC[4]
PCK[0]
PCK[0]
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Bit 4
Bit 4
-
DAC data update is needed and the same signal will decide
the sampling rate of voice. In DAC mode, the frequency of
RC oscillator can’ t be less than 2M Hz.
PSG1[11] PSG1[10] PSG1[9] PSG1[8] - - - - 0 0 0 0
DMD[1]
DAC[3]
PRBS
Bit 3
DMD[1]
DAC[3]
PRBS
Bit 3
Bit 3
DMD[0]
DAC[2]
C1EN
Bit 2
DMD[0]
DAC[2]
C1EN
Bit 2
Bit 2
DAC[1]
C0EN
Bit 1
INH
DAC[1]
C0EN
Bit 1
Bit 1
INH
DACE=0 - 0 0 0 0 0 - 0
DACE=1 - 0 0 0 0 0 0 0
DAC[0] 0 0 0 0 0 0 0 0
Bit 0
DACE=0
DACE=1
DAC[0]
Bit 0
Bit 0
Default
0000 0000
- 000 0000
- 000 00-0
Default
Default
ST2064B
5/8/09