t5743n ATMEL Corporation, t5743n Datasheet
t5743n
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t5743n Summary of contents
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... UHF ASK/FSK Receiver Description The T5743N is a multi-chip PLL receiver device supplied in an SO20 package. It has been especially developed for the demands of RF low-cost data transmission systems with data rates from 1 kBaud to 10 kBaud in Manchester or Bi-phase code. The receiver is well suited to operate with the TEMIC Semiconductors’ ...
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... T5743N Pin Description SENS 1 2 IC_ACTIVE 3 CDEM 4 AVCC 5 TEST T5743N 6 AGND 7 MIXVCC 8 LNAGND LNA_IN 9 10 n.c. Figure 2. Pinning SO20 2 (34) Pin Symbol 1 SENS 2 IC_ 20 DATA ACTIVE 3 CDEM 19 POLLING /_ON 4 AVCC 5 TEST 18 DGND 6 AGND 7 MIXVCC Power supply mixer DATA_CLK 17 8 LNAGND High-frequency ground LNA and ...
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... The value of that capacitor is recommended by the crystal supplier. The value of CL should be optimized for the individual board layout to achieve the exact value of f and hereby receiving bandwidth, the accuracy of the crystal and the XTO must be considered. Preliminary Information T5743N Data DATA interface POLLING/_ON TEST and ...
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... The parasitic board inductances and capaci- tances also influence the input matching. The RF receiver T5743N exhibits its highest sensitivity at the best signal- to-noise ratio in the LNA. Hence, noise matching is the best choice for designing the transformation network. ...
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... IF filter. The IF center frequency 315 MHz input frequencies refer to table 1 to determine the center frequency. The receiver T5743N employs an IF bandwidth 600 kHz and can be used together with the U2741B IF in FSK and ASK mode. Preliminary Information T5743N ...
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... T5743N RSSI Amplifier The subsequent RSSI amplifier enhances the output signal of the IF amplifier before it is fed into the demod- ulator. The dynamic range of this amplifier dB. If the RSSI amplifier is operated within RSSI its linear range, the best S/N ratio is maintained in ASK mode ...
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... They should not be exceeded to maintain full sensitivity of the receiver. Receiving Characteristics The RF receiver T5743N can be operated with and with- out a SAW front-end filter typical automotive application, a SAW filter is used to achieve better selec- tivity. The selectivity with and without a SAW front-end filter is illustrated in figure 8 ...
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... T5743N Pin MODE can now be set in accordance with the desired clock cycle controls the following application- Clk Clk relevant parameters: D Timing of the polling circuit including bit check D Timing of the analog and digital signal processing D Timing of the register programming D Frequency of the reset marker ...
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... Baud0 and Baud1 in the OPMODE register. Figure 10. Polling mode flow chart Bit check ok 1/2 Bit 1/2 Bit 1/2 Bit 1/2 Bit T Bit–check Bit–check mode Preliminary Information T5743N Std XTO . The baud-rate range Clk Bit-check ) and on the Bit-check . The baud-rate range is Clk 1/2 Bit 1/2 Bit ...
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... T5743N Bit-Check Mode In bit-check mode the incoming data stream is examined to distinguish between a valid signal from a correspond- ing transmitter and signals due to noise. This is done by subsequent time frame checks where the distances be- tween 2 signal edges are continuously compared to a programmable time window. The maximum count of this edge-to-edge tests before the receiver switches to receiv- ing mode is also programmable ...
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... DATA or by the data clock at Pin DATA_CLK. The re- Bit-check , and the ceiver stays in that condition until it is switched back to Sig . A higher value for polling mode explicitly. Preliminary Information T5743N Bit check ok Bit check ok 1/2 Bit ...
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... T5743N Digital Signal Processing The data from the ASK/ FSK demodulator (Dem_out) is digitally processed in different ways and as a result con- verted into the output signal data. This processing depends on the selected baud-rate range (BR_Range). Figure 16 illustrates how Dem_out is synchronized by the extended clock cycle T ...
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... Bit 1 (”1”) (Start bit on2 on3 Sleep mode Start–up mode Preliminary Information T5743N elapses. Note that the capacitive load at Pin T T Sleep Sleep mode Start–up mode Bit check Bit–check mode Receiving mode Start–up ...
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... T5743N IC_ACTIVE POLLING/_ON Data_out (DATA) Serial bi–directional data line Sleep mode Figure 21. Activating the receiving mode via Pin POLLING/_ON Figure 20 illustrates how to set the receiver back to poll- ing mode via Pin POLLING/_ON. POLLING/_ON must be held to low for the time period t . After the positive edge on Pin POLLING/_ON and ...
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... Data Logical error (Manchester code violation) ’1’ ’1’ ’0’ ’1’ ’1’ Receiving mode, data clock control logic active Preliminary Information T5743N Data ’1’ ’1’ ’0’ ’1’ ’0’ Delay P_Data_Clk Receiving mode > ...
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... T5743N Bit check ok ’1’ Dem_out Data_out (DATA) DATA_CLK Receiving mode, bit check active Figure 25. Output of the data clock after a successful bit check The delay of the data clock is calculated as follows Delay Delay1 Delay2 t is the delay between the internal signals Data_Out Delay1 and Data_In ...
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... OR T < t Timing error ee Lim_min Lim_max ’1’ ’1’ T Pulse Preliminary Information T5743N Preburst Data Digital Noise Receiving mode, Receiving mode, data clock control bit check aktive logic active Preburst Data Receiving mode, Bit–check data clock control mode logic active < ...
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... Bit–check Receiving mode mode Configuration of the Receiver The T5743N receiver is configured via two 12-bit RAM registers called OPMODE and LIMIT. The registers can be programmed by means of the bidirectional DATA port. If the register contents have changed due to a voltage drop, this condition is indicated by a certain output pat- tern called reset marker (RM) ...
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... XLim = 1 Bit-check Number of Bits to be Checked Number of Bits to be Checked É É É É É É É É É É É É É É É É É É É É Selected Modulation Preliminary Information T5743N Bit 11 Bit 12 Bit 13 Bit 14 Bit 15 X Noise ...
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... T5743N É É É É É É É É É É É É É 0 É É É É É É É É É É É É É 1 Table 8. Effect of the configuration word Sleep Sleep Sleep4 Sleep3 Sleep2 ...
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... Lim_max is also be used to determine the margins of the data clock control logic (see chapter ’Data Clock’) Conservation of the Register Information The T5743N implies an integrated power-on reset and brown-out detection circuitry to provide a mechanism to preserve the RAM register information. According to figure 32, a power–on reset (POR) is gener- ...
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... Programming frame Figure 33. Timing of the register programming T5743N R pup DATA 0 ... 20 V Serial bi–directional data line C L Figure 34. Data interface subsequently programmed this way. The time frame to program a bit is defined by t6. ...
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... Hints U3743BM’. BR_range Preliminary Information T5743N up to 20V and is short–circuit–protected. depends on the load pup at Pin DATA and the selected BR_range (see Applicable R pup 1.6 kΩ kΩ 1.6 kΩ kΩ 1.6 kΩ kΩ 1.6 kΩ to 5.6 kΩ ...
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... MIXVCC 8 LFGND 13 6.7643MHz LNAGND LNA_IN 10 LFVCC 11 NC C12 10n 10% R1 820 5% np0 C9 4. 433.92 MHz without SAW filter RF R2 56k to 150K T5743N 1 DATA 20 SENS 2 POLLING/_ON 19 IC_ACTIVE 3 DGND 18 CDEM DATA_CLK 17 4 MODE 16 AVCC 5 TEST 6 DVCC 15 AGND Q1 7 XTO 14 MIXVCC 8 LFGND 13 4.906MHz ...
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... L3 TOKO LL2012 F47NJ R1 47n 820 OUT 5 4. OUT_GND 7 8 CASE_GND = 315 MHz with SAW filter RF Preliminary Information T5743N IC_ACTIVE Sensitivity reduction >= 1.6k DATA POLLING/_ON DATA_CLK Q1 C11 12p 2% np0 C8 150p 10% R1 820 5% C9 4.7n C10 5% 1n ...
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... T5743N Absolute Maximum Ratings Parameters Supply voltage Power dissipation Junction temperature Storage temperature Ambient temperature Maximum input level, input matched Thermal Resistance Parameters Junction ambient Electrical Characteristics All parameters refer to GND –40°C to +105°C, V amb less otherwise specified. (For typical values: V ...
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... Preliminary Information T5743N = 433.92 MHz and f = 315 MHz, un Variable Oscillator Max. Min. Typ. Max. 10 × × T 163 XClk XClk 10 × × XClk XClk 10 × ...
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... T5743N Electrical Characteristics (continued) All parameters refer to GND –40°C to +105°C, V amb less otherwise specified. (For typical values: V Parameter Test Conditions Symbol Configuration of the receiver (continued) Synchroni– t3 zation pulse (figures 19 and 33) Delay until of t4 the program window starts (figures 19 ...
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... LNA_IN IP 1db in P in_max ≤ – VCO L (fm) K VCO B Loop C LF_tot f XTO R S 4.906 MHz C 0 Preliminary Information T5743N = 433.92 MHz and f = 315 MHz, un Min. Typ. Max. 170 276 7.5 9.1 7.1 8.7 –28 –73 –57 7 1.0 || 1.56 1.3 || 1.0 –40 –22 –20 299 449 –93 –90 – ...
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... T5743N Electrical Characteristics (continued) All parameters refer to GND –40°C to +105°C, V amb less otherwise specified. (For typical values: V Parameters Test Conditions / Pins Analog signal processing Input sensitivity ASK Input matched according to figure 6 ASK (level of carrier) BERv10 f = 433.92 MHz / 315 MHz ...
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... MHz P in Ref_Red = 315 MHz P in Ref_Red DP Red + DP Ref_Red Red DP Red DP Red DP Red DP Red DP Red DP Red + DP Ref_Red Red V ThRESET Preliminary Information T5743N = 433.92 MHz and f = 315 MHz, un Min. Typ. Max 0.11 0.16 0. 8.2 270 1000 156 560 89 320 50 180 2.8 3.4 4.0 4.8 6.0 7 ...
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... T5743N Electrical Characteristics (continued) All parameters refer to GND –40°C to +105°C, V amb less otherwise specified. (For typical values: V Parameters Test Conditions / Pins Digital ports Data output – Saturation voltage Low ≤ – max voltage @ Pin DATA – ...
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... Package Information Package SO20 Dimensions in mm 12.95 12.70 0.4 1.27 11. Rev. A1, 25-May-00 2.35 0.25 0.10 11 technical drawings according to DIN specifications 10 Preliminary Information T5743N 9.15 8.65 7.5 7.3 0.25 10.50 10.20 13038 33 (34) ...
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... T5743N Ozone Depleting Substances Policy Statement It is the policy of TEMIC Semiconductor GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment ...