t14m1024a TM Technology Inc., t14m1024a Datasheet - Page 7

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t14m1024a

Manufacturer Part Number
t14m1024a
Description
128k X 8 High Speed Cmos Static Ram
Manufacturer
TM Technology Inc.
Datasheet
tm
Notes: 1. During this period, I/O pins are in the output state, so input signals of opposite phase to the
TM Technology Inc. reserves the right
to change products or specifications without notice.
2. The data output from
3.
4. Transition is measured ± 500 mV from steady state with
5. If OE is low during a WE controlled write cycle, the write pulse width must be the larger of
outputs should not be applied.
guaranteed but not 100% tested.
t WP or (t WHZ + t DW ) to allow the I/O drivers to turn off and data to be placed on the bus for the
required t DW .
not apply and the write pulse can be as short as the specified t WP .
D
CH
OUT
TE
provides the read data for the next address.
If OE is high during a WE controlled write cycle, this requirement does
D
OUT
are the same as the data written to
P. 7
C
L
= 5pF.
D
IN
Publication Date: SEP. 2002
This parameter is
during the write cycle.
T14M1024A
Revision:E

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