sm59264 SyncMOS Technologies,Inc, sm59264 Datasheet - Page 25

• Manufacturer Part Number: sm59264
• Description: 8-bits Micro-controller With 128kb Flash & 1kb Ram & Twsi & Spwm Embedded
• Manufacturer: SyncMOS Technologies,Inc

TWSI Control Register 2 (TWSIC2, $C3
Note1:Read and Writer’0’ only
Note2:Read only
Note3:Read and Writer
SRW : The Slave Rw bit will indicate the data direction of TWSI protocol. It is updated after the calling address is
MRW : This MRW bit will be transmitted out as the bit 0 of the calling address when the module sets the MAS TER bit
TWSI Transmit Data Buffer (TWSITxD, $C4)
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M012 Ver B SM59264
MATCH : The MATCH flag is set when the first received data (following START signal) in the IRDB register which
RESTART: If set this RESTART bit in master mode (MASTER=1), the module will generate a start condition to the
Reset value:
Read/Write:
to enter the master mode. It will also determine the transfer direction of the following data bytes. When it is one,
the module is in master receive mode. When it is zero, the module is in master transmit mode. Reset clears this
bit.
SyncMOS Technologies International, Inc.
received in the SLAVE mode. When it is one, the master will read the data from TWSI module, so the module
is in transmit mode. When it is zero, the master will send data to the TWSI module, the module, the module is
in receive mode. The reset clear it.
matches with the address or its extended addresses (EXTAD=1) specified in the IADR.
SDA and SCL lines (after current ACK bit) and send out the calling address which is stored in the
TWSIADR register. But if the TFIF flag is set when transmit fail occurs on the lines, the module will discard
the master mode by clearing the MASTER bit and release bit SDA and SCL lines immediately. This bit will
clear automatically after generate a start condition to the SDA and SCL lines. Reset clears this bit.
Bit-7
Note: clock source is from external (12M Hz).
MATCH
Note1
bit-7
1
Note1
SRW
0
0:0:0
0:0:1
0:1:0
0:1:1
1:0:0
1:0:1
1:1:0
1:1:1
0
-
)
with 128KB flash & 1KB RAM & TWSI & SPWM embedded
25
0
-
RSTART
Note2
0
Unused
12.5K
6.25K
400K
200K
100K
50K
25K
0
-
8-Bits Micro-controller
0
-
SM59264
Note3
MRW
05/2009
bit-0
0
bit-0