sl4066bn System Logic Semiconductor. co., sl4066bn Datasheet - Page 4

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sl4066bn

Manufacturer Part Number
sl4066bn
Description
Quad Bilateral Switch
Manufacturer
System Logic Semiconductor. co.
Datasheet
AC ELECTRICAL CHARACTERISTICS
ADDITIONAL APPLICATION CHARACTERISTICS
*
Guaranteed limits not tested. Determined by design and verified by qualification.
t
SLS
t
Symbol
t
Symbol
PLZ
PLH
PZL
THD
BW
BW
BW
, t
-
-
C
, t
, t
PHZ
PHL
PZH
System Logic
Semiconductor
,
Total Harmonic
Distortion
Maximum On-Channel
Bandwidth or
Minimum Frequency
Response
Maximum On-Channel
Bandwidth or
Minimum Frequency
Response
Maximum On-Channel
Bandwidth or
Minimum Frequency
Response
Cross talk (Control
Input to Signal
Output)
Maximum Control
Input Repetition Rate
Maximum Propagation Delay, Analog Input to
Analog Output (Figure 2)
Maximum Propagation Delay, ON/OFF Control
to Analog Output (Figure 3)
Maximum Capacitance
Parameter
Parameter
V
R
V
R
V
R
V
V
V
R
V
t
R
V
C
V
t
V
r
r
, t
, t
C
L
C
L
C
L
C
C
IS
L
C
L
IS
L
C
OS
ON/OFF Control Input
= 10 V
= 10 V (square wave centered on 5 V)
= V
= V
= 10 k , f
= V
= 1 k
= GND , V
= 1 k
(A) = V
(B) = GND = -5 V
(A) = 5 V
= 1 k
f
= 10 k
= 50 pF
f
= 1/2 V
Control Input = GND
= 20 ns
= 20 ns,
CC
CC
CC
, R
, GND = -5 V
, GND = -5 V
CC
OS
L
Feedthrough
P - P
= 1 k
= 5 V
IS
IS
Analog I/O
@1 kHz
Test Conditions
(C
=1 kHz sine wave
= 5 V
,50
L
=50pF, R
source
L
=200k , Input t
V
5.0
5.0
10
15
10
15
V
-
CC
(Voltages Referenced to GND Unless Noted)
-55 C
40
20
15
70
40
30
Guaranteed Limit
r
=t
f
=20 ns)
V
10
10
10
15
25 C
V
5
5
5
5
CC
7.5
0.6
40
20
15
70
40
30
15
Limit
25 C
0.4
9.5
40
50
SL4066B
1
8
6
9
125 C
140
80
40
30
80
60
*
MHz
MHz
MHz
MHz
Unit
Unit
mV
ns
ns
pF
%

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