isl55211 Intersil Corporation, isl55211 Datasheet
isl55211
Related parts for isl55211
isl55211 Summary of contents
Page 1
... It's ultra high differential slew rate of 5600V/µs provides adequate performance margin for large signal application through 500MHz. The ISL55211 requires only a single 3.3V (max. 4.2V) power supply and 35mA quiescent current, providing a very low power solution (115mW). Further power savings are possible using the optional power shutdown control - where the quiescent current can be reduced to < ...
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... RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL55211. For more information on MSL please see techbrief TB363. 2 ...
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... Test Circuit 1, 15dB Gain 2nd-order Intermodulation Distortion, Test Circuit 1, 15dB Gain 3rd-order Intermodulation Distortion, Test Circuit 1, 15dB Gain Output Voltage Noise DC PERFORMANCE (Internal Nodes) Input Offset Voltage 3 ISL55211 Thermal Information (T = +25°C) A Thermal Resistance (Typical) +0.3V to GND-0. TQFN Package (Notes Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65° ...
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... CM Input Voltage Range CM Input Impedance POWER SUPPLY Specified Operation Voltage Quiescent Current Power-supply Rejection (PSRR POWER-DOWN (Pin 7) Enable Voltage Threshold Disable Voltage Threshold 4 ISL55211 = +3.3V Test Conditions 12dB CONDITIONS T = -40°C to +85° +25°C, positive current into the pin ...
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... G FIGURE 2. INTENDED CONFIGURATION 5 ISL55211 = +3.3V Test Conditions 12dB CONDITIONS T = +25° -40°C to +85° 0V, current positive into pin Measured to output on Measured to output off TABLE 1. ISL55211 INTENDED TRANSFORMER + INTERNAL GAIN ISL55211 INPUT 500 XFMR TURNS RATIO + 1:1.4 1:1 1:1.4 1:2 - 1:2 1:2 500 = open, V ...
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... GAIN = 9dB GAIN = 17dB GAIN = 15dB 5 TEST CIRCUIT # 100 150 200 250 300 FREQUENCY (MHz) FIGURE 7. NOISE FIGURE WITH ADT2-1T INPUT TRANSFORMER 6 ISL55211 ≈ +25°C, unless otherwise noted 3.3V TEST CIRCUIT #1 ...
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... TEST CIRCUIT 1 GAIN = 15dB -60 HD2 of 100Ω HD2 of 200Ω -70 -80 -90 -100 HD3 of 100Ω HD3 of 50Ω -110 50M 100M FREQUENCY (Hz) FIGURE 13. HD2, HD3 vs DIFFERENTIAL LOAD 7 ISL55211 ≈ +25°C, unless otherwise noted 3.3V -60 HD2 of 3V P-P -70 -80 -90 -100 -110 P-P HD3 of 1V P-P ...
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... FIGURE 17. SMALL SIGNAL FREQUENCY RESPONSE 200mV P -12 -15 -18 TEST CIRCUIT 3 COMMON MODE AC OUTPUT - FREQUENCY (MHz) FIGURE 19. V PIN INPUT FREQUENCY RESPONSE TO OUTPUT CM COMMON MODE 8 ISL55211 ≈ +25°C, unless otherwise noted 3.3V 1.7 15 TEST CIRCUIT 1 14 WITH ADT2-1T INPUT 1 1 ...
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... ENABLED ENABLED PD DISABLED DISABLED 2µs/DIV 2µs/DIV FIGURE 23. ENABLE/DISABLE TIMES (2µs/DIV) 2.5 OUTPUT 2.0 1.5 1.0 INPUT 0.5 0 -0.5 -1.0 -1.5 -2.0 TEST CIRCUIT 1 -2 100 TIME (ns) FIGURE 25. OVERDRIVE RECOVERY 9 ISL55211 ≈ +25°C, unless otherwise noted 3.3V 1.5 OUTPUT 1.0 0.5 0 -0 -14.4 -14.6 -14.8 -15.0 -15.2 -15.4 -15.6 -15.8 -16.0 1M TEST CIRCUIT 1 95 ...
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... SFDR. Where DC-coupled differential I/O operation is desired, the ISL55211 can be connected directly to the source as long as the internal input common mode range limits are observed (1.1V to 1.7V for a 3.3V single supply operation). For a DC-coupled, single to differential requirement, consider the ISL55210. This device is ...
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... V CM will also appear as the input common mode voltage. This provides a very easy way to control the ISL55211 I/O common mode operating voltages for an AC-coupled signal path. The internal common mode loop holds the output pins to V since there path for an I ...
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... Converting to just a differential signal at the amplifier Figure 29, removes any input signal related artifacts from the input common mode making the ISL55211 behave as a differential only VFA amplifier. There is only a very small differential error signal at the inputs set by the loop gain ...
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... Briefly, the I/O and V limits are as follows Maximum V setting = -Vs + Input common mode operating range (internal summing junction pints of the ISL55211) of - output V + 0.5V 3. Output V minimum (on each side) is either - output Output V maximum (on each side ...
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... Figure shows the analysis model for just the ISL55211 with no input transformer while Table 3 shows the resulting output and input referred differential spot noise voltages using Equation 1. With equal feedback and gain resistors, the total output noise expression becomes very simple. This is shown as Equation 1. ∗ ...
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... Driving ADC's 500 Many of the intended applications for the ISL55211 are as a low power, very high dynamic range, last stage interface to high R performance ADC's. The lowest power ADC's, such as the F ISLA214P50 shown on the front page, include an innovative " ...
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... FIGURE 38. AC-COUPLED WITH OUTPUT SIDE TRANSFORMER 4. DC-coupled with ADC V amplifier. Here very high frequency interstage low pass filter can be provided. Again, the R reduce the IR drop from the shows up on the output of the ISL55211, to the ADC input pins ...
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... Layout Considerations The ISL55211 pinout is organized to isolate signal I/O along one axis of the package with ground, power and control pins on the other axis. Ground and power should be planes coming into the upper and lower sides of the package (see “Pin Configuration” on page 2). The signal I/O should be laid out as tight as possible. ...
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... DNP Cterm2 2.2pF R1006 R1007 R1008 R1009 R1010 R1011 0ohm/DNP 0ohm/DNP 0ohm/DNP 0ohm/DNP 0ohm/DNP 0ohm/DNP Pd R22 50ohm FIGURE 40. ISL55210, ISL55211 SINGLE INPUT TRANSFORMER EVALUATION BOARD REV C R21 VCC 200ohm/DNP C3 R19 C2 100nf 1k/DNP 100nF TP1 R17 R18 200ohm 50ohm TEST POINT C9 100nf ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see 19 ISL55211 www.intersil.com/askourstaff http://rel.intersil.com/reports/search.php For additional products, see www ...
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... Package Outline Drawing L16.3x3D 16 LEAD THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 0, 3/10 3.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW (2.80 TYP) ( 1.60) TYPICAL RECOMMENDED LAND PATTERN 20 ISL55211 4X 1.50 A 12X 0. 16X 0.40±0.10 BOTTOM VIEW 0.75 ±0.05 SIDE VIEW (12X 0.50) (16X 0.23 REF C (16X 0.60) DETAIL "X" ...