isl54100a Intersil Corporation, isl54100a Datasheet
isl54100a
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isl54100a Summary of contents
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... ISL54100A, ISL54101A, ISL54102A Key Features June 17, 2008 Features • ISL54100A: 4:1 TMDS regenerator and multiplexer • ISL54101A: 1:1 TMDS regenerator • ISL54102A: 2:1 TMDS regenerator and multiplexer • Clock Data Recovery and Retiming function enables use as TMDS range extender • Programmable pre-emphasis on output driver • ...
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... Block Diagram of ISL54100A 2 RXC_A TERMINATION 2 RX0_A TERMINATION 2 RX1_A 2 EQUALIZATION RX2_A 2 RXC_B TERMINATION 2 RX0_B TERMINATION 2 RX1_B 2 EQUALIZATION RX2_B 2 RXC_C TERMINATION 2 RX0_C TERMINATION 2 RX1_C 2 EQUALIZATION RX2_C 2 RXC_D TERMINATION 2 RX0_D TERMINATION 2 RX1_D 2 EQUALIZATION RX2_D RES_TERM RES_BIAS GENERATION SDA SCL 7 ADDR PD RESET AUTO_CH_SEL CH_SEL_ 0 CH_SEL_1 ...
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... PU R Internal Pull-Down Resistance PD C Input Capacitance IN 3 ISL54100A, ISL54101A, ISL54102A ISL54100A, ISL54101A, ISL54102A Thermal Information Thermal Resistance (Typical, Note 1) +0.3V MQFP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 D Maximum Biased Junction Temperature . . . . . . . . . . . . . . . . +125°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Recommended Operating Conditions Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0° ...
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... Operation up to 165MHz is guaranteed. While many parts will typically operate up to 225MHz, operation above 165MHz is not guaranteed SCL t SU:STA t HD:STA SDA IN SDA OUT 4 ISL54100A, ISL54101A, ISL54102A = 3.3V, pixel rate = 165MHz COMMENT All available inputs driven by 165Mpixel/s TMDS signals. Default register settings All available inputs driven by 165Mpixel/s TMDS signals ...
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... GND 24 GND RXC-_C 27 RXC+ RXC-_D 30 RXC+ GND RX0-_C 35 RX0+ RESET 38 ADDR3 5 ISL54100A, ISL54101A, ISL54102A CH_D_ACTIVE 102 101 CH_C_ACTIVE CH_B_ACTIVE 100 CH_A_ACTIVE GND 97 96 GND VD_ESD GND GND TXC TXC- 88 GND 87 TX2+ ...
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... RES_BIAS 23 GND 24 GND GND RESET 38 ADDR3 6 ISL54100A, ISL54101A, ISL54102A NC 102 NC 101 100 NC CH_A_ACTIVE GND 96 GND VD_ESD GND VD 92 GND 91 90 TXC+ 89 TXC- GND 88 87 TX2+ 86 TX2- ...
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... RES_BIAS 23 GND 24 GND GND RESET 38 ADDR3 7 ISL54100A, ISL54101A, ISL54102A 102 NC NC 101 100 CH_B_ACTIVE CH_A_ACTIVE GND 97 GND 96 95 VD_ESD GND GND 90 TXC+ 89 TXC- 88 GND TX2 TX2- ...
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... TMDS Inputs. Incoming TMDS data signals for Channel D (ISL54100A only). RX2-_D, RX2+_D RXC-_A, RXC+_A, RXC-_B, RXC+_B, TMDS Inputs. Incoming TMDS clock signals for Channels and D (ISL54100A), Channels A and RXC-_C, RXC+_C, RXC-_D, RXC+_D B (ISL54102A), or Channel A (ISL54101A). TX0-, TX0+, TX1-, TX1+, TX1-, TX1+ TMDS Outputs ...
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... Register Listing ADDRESS REGISTER (DEFAULT VALUE) 0x00 Device ID (read only) 0x01 Channel Activity Detect (read only) 0x02 Channel Selection (0x0C) 9 ISL54100A, ISL54101A, ISL54102A BIT(S) FUNCTION NAME 3:0 Device Revision 1 = initial silicon second revision, etc. 7:4 Device ISL5410xA 0 Channel A Active 0: TMDS clock not present on Channel A ...
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... Register Listing (Continued) ADDRESS REGISTER (DEFAULT VALUE) 0x03 Input Control (0x12) Recommended default: 0x62 10 ISL54100A, ISL54101A, ISL54102A BIT(S) FUNCTION NAME 0 Tri-state Unselected 0: Normal Operation Clock Inputs 1: Termination of unselected TMDS clock inputs is tri-stated to save power. Setting this bit will disable the activity detect function ...
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... REGISTER (DEFAULT VALUE) 0x04 Termination Control (0x00) 0x05 Output Options (0x00) 0x06 Data Output Drive (0x00) 11 ISL54100A, ISL54101A, ISL54102A BIT(S) FUNCTION NAME 0 Data Termination A 0: Channel A TMDS Data inputs terminated into 50Ω (normal operation) 1: Channel A TMDS Data inputs terminated into 100Ω (for ...
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... PRBS7 Error Counter Link 0 (read only) 0x0B PRBS7 Error Counter Link 1 (read only) 0x0C PRBS7 Error Counter Link 2 (read only) 0x10 PLL Bandwidth (0x10) Recommended default: 0x12 12 ISL54100A, ISL54101A, ISL54102A BIT(S) FUNCTION NAME 3:0 Channel A Equalizer Boost (dB) = 1dB + <gain value> * 0.8dB Gain 0x0: 1dB boost at 800MHz 7:4 Channel B Equalizer 0xC: 10 ...
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... Locked Loop (PLL). The PLL generates a low jitter pixel clock from the incoming TMDS clock. The TMDS data signals are equalized, sliced by the CDR, re-aligned to the PLL clock, and sent out the TMDS outputs. The ISL54100A and ISL54102A also include an input multiplexer. Compatibility With the ISL5410x Family ...
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... ISL54100A, ISL54101A, ISL54102A However the FIFO read pointers may be positioned bits apart relative to each other, introducing a random, fixed channel-to-channel skew of skew (much less frequently) 2 bits ...
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... GENERATOR DELL 2000FP UXGA MONITOR ISL54100A Given the input signal shown in Figure 6, the ISL54100A’s TMDS output signal (Figure 8) is extremely clean. The output is an improvement over the original signal coming from the pattern generator in both amplitude and jitter. FIGURE 8. EYE DIAGRAM AT OUTPUT OF ISL54100 ...
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... V _ESD D Tx ISL5410xA FIGURE 10. ISL5410xA ESD PROTECTION DIODES 16 ISL54100A, ISL54101A, ISL54102A This is non-ideal and will cause the ISL5410xA to fail HDMI Compliance Test 7-3 (“V each 50Ω Rx device containing the ISL5410xA. To prevent this leakage current, insert a Schottky diode between the V in Figure 11. With the addition of this diode the system will pass compliance test 7-3 ...
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... IC, and reducing the amount of IC-generated noise that gets 17 ISL54100A, ISL54101A, ISL54102A injected into the supply. Follow the good supply bypassing rules shown in Figure 13 to the extent possible. + ...
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... FROM RECEIVER FIGURE 15. ACKNOWLEDGE RESPONSE FROM RECEIVER SCL SDA 18 ISL54100A, ISL54101A, ISL54102A commonly used to reverse data direction without relinquishing the bus. Data on the serial bus must be valid for the entire time SCL is high (Figure 16). To achieve this, data being written to the ISL5410xA is latched on a delayed version of the rising edge of SCL ...
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... ISL54100A, ISL54101A, ISL54102A START Command ISL5410xA Serial Bus ADDR6 ADDR5 ADDR4 ADDR3 ADDR2 (Repeat if desired) STOP Command S T Serial Bus Register A Signals from Address Address R the Host AAAAAAAA SDA Bus A Signals from ...
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... ISL54100A, ISL54101A, ISL54102A START Command ISL5410xA Serial Bus ADDR6 ADDR5 ADDR4 ADDR3 ADDR2 START Command ISL5410xA Serial Bus ADDR6 ADDR5 ADDR4 ADDR3 ADDR2 (Repeat if desired) STOP Command S T Serial Bus Register Signals from A Address Address the Host ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 21 ISL54100A, ISL54101A, ISL54102A MDP0055 14x20mm 128 LEAD MQFP (WITH AND WITHOUT HEAT SPREADER) 3.2mm FOOTPRINT ...