isl8009a Intersil Corporation, isl8009a Datasheet - Page 9

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isl8009a

Manufacturer Part Number
isl8009a
Description
1.5a Low Quiescent Current 1.6mhz High Efficiency Synchronous Buck Regulator
Manufacturer
Intersil Corporation
Datasheet

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Theory of Operation
The ISL8009A is a step-down switching regulator optimized
for battery-powered handheld applications. The regulator
operates at 1.6MHz fixed switching frequency under heavy
load condition to allow small external inductor and capacitors
to be used for minimal printed-circuit board (PCB) area. At
light load, the regulator reduces the switching frequency,
unless forced to the fixed frequency to minimize the
switching loss and to maximize the battery life. The
quiescent current when the output is not loaded is typically
only 17µA. The supply current is typically only 0.1µA when
the regulator is shutdown.
PWM Control Scheme
The ISL8009A employes the current-mode pulse-width
modulation (PWM) control scheme for fast transient
response and pulse-by-pulse current limiting. Figure 25
shows the block diagram. The current loop consists of the
oscillator, the PWM comparator COMP, the current sensing
circuit, and the slope compensation for the current loop
stability. The current sensing circuit consists of the
resistance of the P-Channel MOSFET when it is turned on
and the current sense amplifier CSA. The gain for the
current sensing circuit is typically 0.4V/A. The control
reference for the current loops comes from the error
amplifier EAMP of the voltage loop.
The PWM operation is initialized by the clock from the
oscillator. The P-Channel MOSFET is turned on at the
beginning of a PWM cycle and the current in the MOSFET
starts to ramp up. When the sum of the current amplifier CSA
and the compensation slope (0.675V/µs) reach the control
reference of the current loop, the PWM comparator COMP
sends a signal to the PWM logic to turn off the P-MOSFET
and to turn on the N-Channel MOSFET. The N-MOSFET
stays on until the end of the PWM cycle. Figure 26 shows the
typical operating waveforms during the PWM operation. The
dotted lines illustrate the sum of the compensation ramp and
the current-sense amplifier CSA output.
CLOCK
Clock
V
OUT
I
0
L
8 CYCLES
8 Cycles
9
Nominal + 1.5%
NOMINAL +1.5%
FIGURE 27. SKIP MODE OPERATION WAVEFORMS
ISL8009A
LOAD CURRENT
CURRENT LIMIT
NOMINAL
Load Current
Current Limit
Nominal
The output voltage is regulated by controlling the reference
voltage to the current loop. The bandgap circuit outputs a
0.8V reference voltage to the voltage control loop. The
feedback signal comes from the VFB pin. The soft-start
block only affects the operation during the start-up and will
be discussed separately. The error amplifier is a
transconductance amplifier that converts the voltage error
signal to a current output. The voltage loop is internally
compensated with the 30pF and 300k: RC network. The
maximum EAMP voltage output is precisely clamped to the
bandgap voltage (1.172V).
SKIP Mode
The ISL8009A enters a pulse-skipping mode at light load to
minimize the switching loss by reducing the switching
frequency. Figure 27 illustrates the skip-mode operation. A
zero-cross sensing circuit shown in Figure 25 monitors the
N-MOSFET current for zero crossing. When 8 consecutive
cycles of the N-MOSFET crossing zero are detected, the
regulator enters the skip mode. During the 8 detecting
cycles, the current in the inductor is allowed to become
negative. The counter is reset to zero when the current in
any cycle does not cross zero.
CYCLE
Cycle
V
V
Duty
DUTY
V
EAMP
CSA1
OUT
I
L
FIGURE 26. PWM OPERATION WAVEFORMS
February 13, 2008
FN6656.0

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