isl9440b Intersil Corporation, isl9440b Datasheet - Page 20

• Manufacturer Part Number: isl9440b
• Description: Triple Step-down Pwm And Single Linear Controller With Programmable Soft-start
• Manufacturer: Intersil Corporation

Where Q
charge the gate of the upper MOSFET. The ΔV
defined as the allowable droop in the rail of the upper drive.
As an example, suppose an upper MOSFET has a gate
charge (QGATE) of 25nC at 5V and also assume the droop
in the drive voltage over a PWM cycle is 200mV. One will
find that a bootstrap capacitance of at least 0.125µF is
required. The next larger standard value capacitance is
0.22µF. A good quality ceramic capacitor is recommended.
Protection Circuits
The converter output is monitored and protected against
overload, short circuit and undervoltage conditions. A
sustained overload on the output sets the PGOOD low and
initiates hiccup mode.
Undervoltage Lockout
The ISL9440B and ISL9440C include UVLO protection that
will keep the devices in a reset condition until a proper
operating voltage is applied and that will also shut down the
ISL9440B and ISL9440C if the operating voltage drops
below a pre-defined value. All controllers are disabled when
UVLO is asserted. When UVLO is asserted, PGOOD will be
valid and de-asserted.
Overcurrent Protection
All the PWM controllers use the lower MOSFETs
ON-resistance, r
converter. The sensed voltage drop is compared with a
threshold set by a resistor connected from the OCSETx pin
to ground.
Where, I
and R
the ISENx pin. If an overcurrent is detected for 2 consecutive
clock cycles, then the IC enters a hiccup mode by turning off
the gate drivers and entering into soft-start. The IC will cycle
4 times through soft-start before trying to restart. The IC will
continue to cycle through soft-start until the overcurrent
condition is removed. Hiccup mode is active during soft-start
so care must be taken to ensure that the peak inductor
current does not exceed the overcurrent threshold during
soft-start.
Because of the nature of this current sensing technique, and
to accommodate a wide range of r
value of the overcurrent threshold should represent an
overload current about 150% to 180% of the maximum
operating current. If more accurate current protection is
desired, place a current sense resistor in series with the
lower MOSFET source.
R
OCSET
CS
OC
GATE
is a value of the current sense resistor connected to
=
is the desired overcurrent protection threshold,
------------------------------------------ -
(
I
OC
is the amount of gate charge required to fully
7 ( ) R
DS(ON)
) r
(
(
DS ON
CS
(
, to monitor the current in the
)
)
)
20
DS(ON)
variations, the
BOOT
ISL9440B, ISL9440C
term is
(EQ. 6)
Overvoltage Protection
All switching controllers within the ISL9440B and ISL9440C
have fixed overvoltage set points. The overvoltage set point
is set at 118% of the nominal output voltage, the output
voltage set by the feedback resistors. In the case of an
overvoltage event, the IC will attempt to bring the output
voltage back into regulation by keeping the upper MOSFET
turned off and modulating the lower MOSFET for 2
consecutive PWM cycles. If the overvoltage condition has
not been corrected in 2 cycles and the output voltage is
above 118% of the nominal output voltage, the ISL9440B
and ISL9440C will turn off both the upper MOSFET and the
lower MOSFET. The ISL9440B and ISL9440C will enter
hiccup mode until the output voltage return to 110% of the
nominal output voltage.
Over-Temperature Protection
The IC incorporates an over-temperature protection circuit
that shuts the IC down when a die temperature of +150°C
is reached. Normal operation resumes when the die
temperatures drops below +130°C through the initiation of
a full soft-start cycle.
Feedback Loop Compensation
To reduce the number of external components and to simplify
the process of determining compensation components, all
PWM controllers have internally compensated error
amplifiers. To make internal compensation possible several
design measures were taken.
First, the ramp signal applied to the PWM comparator is
proportional to the input voltage provided via the VIN pin.
This keeps the modulator gain constant with variation in the
input voltage. Second, the load current proportional signal is
derived from the voltage drop across the lower MOSFET
during the PWM time interval and is subtracted from the
amplified error signal on the comparator input. This creates
an internal current control loop. The resistor connected to
the ISEN pin sets the gain in the current feedback loop.
Equation 7 estimates the required value of the current sense
resistor depending on the maximum operating load current
and the value of the MOSFETs r
Choosing R
sample and hold circuitry is recommended, but values down
to 2µA and up to 100µA can be used. The higher sampling
current will help to stabilize the loop.
Due to the current loop feedback, the modulator has a single
pole response with -20dB slope at a frequency determined
by the load, as shown in Equation 8.
F
R
PO
CS
≥
=
(
---------------------------------------------- -
-------------------------------- -
2π R
I
MAX
⋅
CS
30μA
) r
1
O
(
to provide 30µA of current to the current
⋅
DS ON
C
O
(
)
)
DS(ON)
.
January 15, 2009
(EQ. 7)
(EQ. 8)
FN6799.0