isl6455a Intersil Corporation, isl6455a Datasheet

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isl6455a

Manufacturer Part Number
isl6455a
Description
0.6a Pwm Regulator And Dual 0.3a Ldos And Reset
Manufacturer
Intersil Corporation
Datasheet

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Triple Output Regulator with Single
Synchronous Buck and Dual LDO
The ISL6455 is a highly integrated triple output regulator
which provides a single chip solution for FPGAs and wireless
chipset power management. The device integrates a high
efficiency synchronous buck regulator (adjustable) with two
ultra low noise LDO regulators (adjustable). Either the
ISL6455 or ISL6455A can be selected based on whether
3.3V ±10% or 5V ±10% is required as an input voltage.
The synchronous current mode control PWM regulator with
integrated N- and P-channel power MOSFET provides
adjustable voltages based on external resistor setting.
Synchronous rectification with internal MOSFETs is used to
achieve higher efficiency and reduced number of external
components. Operating frequency is typically 750kHz
allowing the use of smaller inductor and capacitor values.
The device can be synchronized to an external clock signal
in the range of 500kHz to 1MHz. The PG_PWM output
indicates loss of regulation on PWM output.
The ISL6455 also has two LDO adjustable regulators using
internal PMOS transistors as pass devices. LDO2 features
ultra low noise typically below 30µV
The EN_LDO pin controls LDO1 and LDO2 outputs. The
ISL6455 also integrates a RESET function, which eliminates
the need for additional RESET IC required in WLAN and
other applications. The IC asserts a RESET signal whenever
the V
keeping it asserted for at least 25ms after V
above the reset threshold. The PG_LDO output indicates
loss of regulation on either of the two LDO outputs. Other
features include overcurrent protection and thermal
shutdown for all the three outputs.
High integration and the thin Quad Flat No-lead (QFN)
package makes ISL6455 an ideal choice for powering
FPGAs and small form factor wireless cards such as
PCMCIA, mini-PCI and Cardbus-32.
Ordering Information
Add “-TK” or T5K suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
ISL6455IRZ
ISL6455AIRZ
PART NUMBER*
IN
(Note)
supply voltage drops below a preset threshold,
6455IRZ
6455AIRZ
MARKING
PART
®
RANGE (°C)
1
-40 to 85
-40 to 85
TEMP.
RMS
Data Sheet
to aid VCO stability.
24 Ld QFN L24.4x4B
24 Ld QFN L24.4x4B
PACKAGE
(Pb-Free)
IN
has risen
DWG. #
1-888-INTERSIL or 1-888-468-3774
PKG.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Features
• Fully integrated synchronous buck regulator + dual LDO
• PWM output voltage adjustable.
• High output current. . . . . . . . . . . . . . . . . . . . . . . . . 600mA
• Dual LDO adjustable options
• Ultra-compact DC/DC converter design
• Stable with small ceramic output capacitors and no load
• High conversion efficiency
• Low shutdown supply current
• Low dropout voltage for LDOs
• Low output voltage noise
• PG_LDO and PG_PWM (PWM and LDO) outputs
• Extensive circuit protection and monitoring features
• Integrated RESET output for microprocessor reset
• Proven reference design for total WLAN system solution
• QFN package
• Pb-free plus anneal available (RoHS compliant)
Applications
• WLAN cards
• Hand-held instruments
Related Literature
• TB363 - Guidelines for Handling and Processing Moisture
• TB389 - PCB Land Pattern Design and Surface Mount
December 21, 2005
- 0.8V to 2.5V with ISL6455 (VIN = 3.3V)
- 0.8V to 3.3V with ISL6455A (VIN = 5.0V)
- LDO1, 1.2V to Vin-0.3V (3.3Vmax). . . . . . . . . . . 300mA
- LDO2, 1.2V to Vin-0.3V (3.3Vmax). . . . . . . . . . . 300mA
- LDO1 . . . . . . . . . . . . . . . . . . 150mV (typical) at 300mA
- LDO2 . . . . . . . . . . . . . . . . . . 150mV (typical) at 300mA
- <30µV
- PWM overvoltage protection
- Overcurrent protection
- Shutdown
- Thermal shutdown
- Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat
- Near Chip-Scale package footprint Improves PCB
- PCMCIA, Cardbus32, MiniPCI cards
- Compact flash cards
Sensitive Surface Mount Devices (SMDs)
Guidelines for QFN Packages
No Leads - Product Outline
efficiency and is thinner in Profile
All other trademarks mentioned are the property of their respective owners.
|
RMS
Intersil (and design) is a registered trademark of Intersil Americas Inc.
(typical) for LDO2 (VCO supply)
Copyright Intersil Americas Inc. 2005. All Rights Reserved
ISL6455, ISL6455A
FN9196.0

Related parts for isl6455a

isl6455a Summary of contents

Page 1

... December 21, 2005 Features • Fully integrated synchronous buck regulator + dual LDO • PWM output voltage adjustable. - 0.8V to 2.5V with ISL6455 (VIN = 3.3V) - 0.8V to 3.3V with ISL6455A (VIN = 5.0V) • High output current 600mA • Dual LDO adjustable options - LDO1, 1.2V to Vin-0.3V (3.3Vmax 300mA - LDO2, 1.2V to Vin-0.3V (3.3Vmax 300mA • Ultra-compact DC/DC converter design • ...

Page 2

... Pinout Typical Application Schematic 3.3V R1 10k Re FB_PWM Rf PG_PWM 33nF C2 3.3V R3 PG_LDO 10k NOTE: All capacitors are ceramic. 2 ISL6455, ISL6455A ISL6455, ISL6455A (QFN) TOP VIEW SGND FB_LDO2 2 3 FB_LDO1 CC1 4 GND_LDO 5 VOUT1 C10 1.0µF 10µ 8.2µH C7 0.1µ ...

Page 3

... RTN SGND SOFT- COMPENSATION START FB_PWM EA COMPENSATION 750kHz OSCILLATOR EN POWER GOOD PWM V OUT UVLO PWM REFERENCE 0.45V SYNC EN 10k 10k 3.3V 3 ISL6455, ISL6455A BAND GAP REF 1.2V WINDOW COMP. POR EN LOGIC THERMAL WINDOW 150°C COMP. SLOPE EN PWM OVERCURRENT, GM OVERVOLTAGE LOGIC PG_PWM 3.3V 10k Gm ...

Page 4

... Tech Brief TB379. 2. For θ , the “case temp” location is the center of the exposed metal pad on the package underside. JC Electrical Specifications Recommended operating conditions unless otherwise noted. V 5.0V for the ISL6455A, Compensation Capacitors = 33nF for LDO1 and LDO2. T values are at T PARAMETER V SUPPLY CC ...

Page 5

... Electrical Specifications Recommended operating conditions unless otherwise noted. V 5.0V for the ISL6455A, Compensation Capacitors = 33nF for LDO1 and LDO2. T values are at T PARAMETER Efficiency Soft-Start Time OSCILLATOR Oscillator Frequency Frequency Synchronization Range (f SYNC SYNC High Level Input Voltage SYNC Low Level Input Voltage ...

Page 6

... Electrical Specifications Recommended operating conditions unless otherwise noted. V 5.0V for the ISL6455A, Compensation Capacitors = 33nF for LDO1 and LDO2. T values are at T PARAMETER ENABLE (EN and (EN_LDO) EN High Level Input Voltage EN Low Level Input Voltage RESET BLOCK SPECIFICATIONS RESET (reset released) RESET (reset asserted) ...

Page 7

... PG_LDO Timing Diagram UVLO V PG VFB_LDO PG_LDO THRESHOLD VOLTAGE PG_LDO OUTPUT OUTPUT UNDEFINED NOTE the minimum input voltage for a valid PG_LDO ISL6455, ISL6455A V UVLO RISING MAX +18% FALLING MIN -17% t OUTPUT UNDEFINED t FN9196.0 December 21, 2005 ...

Page 8

... This I/O pin senses the output voltage of the PWM OUT converter for the purpose of detecting the over and undervoltage conditions. 8 ISL6455, ISL6455A PG_PWM - This pin is an active pull-up/pull-down able to source/sink 1mA (min.) at 0.4V from V is HIGH when V FB_LDO1 and FB_LDO2 - These pins are used to set the LDO output with the proper selection of resistors ...

Page 9

... LSB (but the counter will not "rollover" or count below 0000). If >33% of the PWM cycles go into overcurrent, the counter rapidly reaches count 1111 9 ISL6455, ISL6455A and the PWM output is shut down and the soft-start counter is reset. After 16 clocks the PWM output is enabled and the SS cycle is started. ...

Page 10

... PWM Regulator Component Selection INDUCTOR SELECTION A 8.2µH typical output inductor is used with the ISL6455 and a 12µH typical with the ISL6455A PWM section. Values less than this may cause stability problems because of the internal compensation of the regulator. The important parameters of the inductor that need to be considered are the current rating of the inductor and the DC resistance of = ambient temperature, and θ ...

Page 11

... The output resistors should be selected so that the minimum output load is about 200 Layout Considerations As for all switching power supplies, the layout is an important step in the design of ISL6455, ISL6455A based power supply due to the high switching frequency and low noise  LDO implementations. ...

Page 12

... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 12 ISL6455, ISL6455A L24.4x4B 24 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE (COMPLIANT TO JEDEC MO-220VGGD-2 ISSUE C) ...

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