isl6422b Intersil Corporation, isl6422b Datasheet
isl6422b
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isl6422b Summary of contents
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... Ordering Information PART NUMBER (Note) ISL6422BERZ* ISL6422BEVEZ* 6422B EVEZ - EPTSSOP M38.173B *Add “-T” suffix for tape and reel. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...
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... TDOUT1 EXTM1 13 26 TDIN1 BYP 14 25 VOUT1 PGND1 15 24 AGND 23 TCAP1 GATE1 16 VSW1 17 22 SELVTOP1 VSW1 CS1 19 20 TXT1 ISL6422B (40 LD 6X6 QFN) TOP VIEW ...
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Block Diagram OLF1 OVERCURRENT COUNTER PROTECTION DCL1 LOGIC SCHEME 1 PWM OC1 LOGIC GATE1 12 Q CLK1 S PGND1 11 ILIM1 CS - AMP CS1 ∑ 15 SLOPE COMPENSATION TDOUT1 23 - TONE TXT1 DECODER VREF1 TDIN1 22 VSW1 14 ...
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... Typical Application Schematic QFN ISL6422BER ...
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... Start to Stop Hysteresis SOFT-START COMP Rise Time (Note 5) Output Voltage (Note 5) Line Regulation Load Regulation 5 ISL6422B Thermal Information Thermal Resistance (Typical, Notes 2, 3) EPTSSOP Package . . . . . . . . . . . . . . . QFN Package Maximum Junction Temperature (Note +150°C Maximum Storage Temperature Range . . . . . . . . . . -40°C to +150°C Operating Temperature Range . . . . . . . . . . . . . . . . . -20°C to +85°C Pb-free reflow profile ...
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... Output Backward Current Threshold Output Backward Current Limit Output Backward Voltage Output Undervoltage (Asserted high during soft-start) Output Overvoltage (Asserted high during soft-start) 6 ISL6422B = -20°C to +85°C, unless otherwise noted. Typical values are access to the system. (Continued) SYMBOL TEST CONDITIONS I ...
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... In the Dynamic current limit mode the output is ON for 51ms and OFF for 900ms. But remains continously ON in the Static mode. When tone is ON the minimum current limit is 50mA lower the values indicated in the table. 7 ISL6422B = -20°C to +85°C, unless otherwise noted. Typical values are access to the system ...
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... TEMPERATURE (°C) FIGURE 2. OUTPUT CURRENT DERATING (EPTSSOP) NOTE: With both channels in simultaneous operation at rated output \ 8 ISL6422B 22kHz 22kHz RETURNS TO NOMINAL VOUT ~1 PERIOD EXTERNAL TONE AFTER THE LAST EXTM RISING EDGE t = 10µs TYP r t >55µs FIGURE 1. TONE WAVEFORM (max) = 0.8V and V (min ...
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... TDIN1, TDIN2 are the tone decoder inputs for Channels 1 and 2. TDOUT1, TDOUT2 are the tone detector outputs for Channels TDOUT1, TDOUT2 1 and 2. TDOUT1, TDOUT2 are open drain outputs. 9 ISL6422B FUNCTION 2 C bus. at this pin for desired overcurrent value for respective PWM. ...
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... Functional Description The ISL6422B dual output voltage regulator makes an ideal choice for advanced satellite set-top box and personal video recorder applications. Both supply and control voltage outputs for two low-noise blocks (LNBs) are available simultaneously in any output configuration. The device utilizes built-in DC/DC step up converters that, from a single ...
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... When the bus is free, both lines are HIGH. The output stages of ISL6422B will have an open drain/open collector in order to perform the wired-AND function. Data on the I transferred up to 100kbps in the standard-mode 400kbps in the fast-mode. The level of logic “ ...
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... SDA line remains at the HIGH level during the ninth clock pulse time. In this case, the master transmitter can generate the STOP information in order to abort the transfer. The ISL6422B will not generate the acknowledge if the POWER OK signal from the UVLO is LOW. SCL ...
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... X NOTE: X indicates “Read Only” and is a “Don’t Care” for the Write mode. 13 ISL6422B SR8) of the ISL6422B via I the microprocessor as shown below. The spare bits of registers can be used for other functions. TABLE 11. STATUS REGISTER SR1 CONFIGURATION OLF1 BCF1 ...
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... NOTE: X indicates “Read Only” and is a “Don’t Care” for the Write mode. 14 ISL6422B TABLE 14. CONTROL REGISTER SR4 CONFIGURATION X VTOP1 VBOT1 SR4 is selected VSPEN1 = SELVTOP1 = 0, VOUT1 = 13V, VBOOST1 = 13V + VDROP ...
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... Received Data ( bus READ MODE The ISL6422B can provide to the master a copy of the 2 system register information via the I The read mode is Master activated by sending the chip address with R/W bit set the following Master generated clock bits, the ISL6422B issues a byte on the SDA data bus line (MSB transmitted first) ...
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... Over and Undervoltage Fault status bit for Channels 1 and 2 OLF1, OLF2 Over Load Fault status bit for Channels 1 and 2 BCF1, BCF2 Backward Current Fault bit for Channels 1 and 2 TTH1, TTH2 Tone THreshold is the OR of the signal pin TXT1, TXT2 16 ISL6422B rises data for that PWM C interface address is 2 TABLE 20 ...
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... Package Outline Drawing L40.6x6 40 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 3, 10/06 6.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW ( TYP ) ( TYPICAL RECOMMENDED LAND PATTERN 17 ISL6422B 4X 4.5 36X 0. 40X ± BOTTOM VIEW ± SIDE VIEW ( 36X ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 18 ISL6422B M38.173B 0.25(0.010) M ...