isl6227 Intersil Corporation, isl6227 Datasheet

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isl6227

Manufacturer Part Number
isl6227
Description
Dual Mobile-friendly Pwm Controller With Ddr Option
Manufacturer
Intersil Corporation
Datasheet

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Dual Mobile-Friendly PWM Controller with
DDR Option
The ISL6227 dual PWM controller delivers high efficiency
precision voltage regulation from two synchronous buck DC/DC
converters. It was designed especially to provide power
regulation for DDR memory, chipsets, graphics and other
system electronics in Notebook PCs. The ISL6227’s wide
input voltage range capability allows for voltage conversion
directly from AC/DC adaptor or Li-Ion battery pack.
Automatic mode transition of constant-frequency synchronous
rectification at heavy load, and hysteretic (HYS)
diode-emulation at light load, assure high efficiency over a wide
range of conditions. The HYS mode of operation can be
disabled separately on each PWM converter if
constant-frequency continuous-conduction operation is desired
for all load levels. Efficiency is further enhanced by using the
lower MOSFET r
Voltage-feed-forward ramp modulation, current mode
control, and internal feedback compensation provide fast
response to input voltage and load transients. Input current
ripple is minimized by channel-to-channel PWM phase shift
of 0°, 90° or 180° (determined by input voltage and status of
the DDR pin).
The ISL6227 can control two independent output voltages
adjustable from 0.9V to 5.5V, or by activating the DDR pin,
transform into a complete DDR memory power supply
solution. In DDR mode, CH2 output voltage VTT tracks CH1
output voltage VDDQ. CH2 output can both source and sink
current, an essential power supply feature for DDR memory.
The reference voltage VREF required by DDR memory is
generated as well.
In dual power supply applications the ISL6227 monitors the
output voltage of both CH1 and CH2. An independent PGOOD
(power good) signal is asserted for each channel after the
soft-start sequence has completed, and the output voltage is
within PGOOD window. In DDR mode CH1 generates the only
PGOOD signal.
Built-in overvoltage protection prevents the output from going
above 115% of the set point by holding the lower MOSFET on
and the upper MOSFET off. When the output voltage re-enters
regulation, PGOOD will go HIGH and normal operation
automatically resumes. Once the soft-start sequence has
completed, undervoltage protection latches the offending
channel off if the output drops below 75% of its set point value.
Adjustable overcurrent protection (OCP) monitors the voltage
drop across the r
current-sensing is required, an external current sense resistor
may be used.
DS(ON)
DS(ON)
as the current sense element.
of the lower MOSFET. If more precise
®
1
Data Sheet
1-888-INTERSIL or 1-888-468-3774
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Features
• Provides regulated output voltage in the range 0.9V to
• Operates from an input battery voltage range of 5V to 28V
• Complete DDR1 and DDR2 memory power solution with
• Flexible PWM or HYS plus PWM mode selection with HYS
• r
• Excellent dynamic response with voltage feed-forward and
• Undervoltage lock-out on VCC pin
• Power-good, overcurrent, overvoltage, undervoltage
• Synchronized 300kHz PWM operation in PWM mode
• Pb-free plus anneal available (RoHS compliant)
Applications
• Notebook PCs and Desknotes
• Tablet PCs/Slates
• Hand-held portable instruments
Ordering Information
ISL6227CA*
ISL6227CAZ*
(Note)
ISL6227IA*
ISL6227IAZ*
(Note)
ISL6227HRZ*
(Note)
ISL6227IRZ*
(Note)
*Add “-T” suffix for tape and reel. Please refer to TB347 for details on
reel specifications.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100% matte
tin plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
5.5V
or from 3.3V/5V system rail
VTT tracking VDDQ/2 and a VDDQ/2 buffered reference
output
diode emulation at light loads for higher system efficiency
current mode control accommodating wide range LC filter
selections
protection for both channels
NUMBER
DS(ON)
PART
August 7, 2007
All other trademarks mentioned are the property of their respective owners.
current sensing
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
ISL 6227CA
ISL 6227CAZ -10 to +100 28 Ld QSOP
ISL 6227IA
ISL 6227IAZ
ISL 6227HRZ -10 to +100 28 Ld QFN
ISL 6227IRZ
MARKING
Copyright Intersil Americas Inc. 2004-2007. All Rights Reserved
PART
RANGE (°C)
-40 to +100 28 Ld QFN
-10 to +100 28 Ld QSOP M28.15
-40 to +100 28 Ld QSOP M28.15
-40 to +100 28 Ld QSOP
TEMP.
(Pb-free)
(Pb-free)
(Pb-free)
(Pb-free)
PACKAGE
ISL6227
FN9094.5
M28.15
M28.15
L28.5x5
L28.5x5
DWG. #
PKG.

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isl6227 Summary of contents

Page 1

... DDR memory. The reference voltage VREF required by DDR memory is generated as well. In dual power supply applications the ISL6227 monitors the output voltage of both CH1 and CH2. An independent PGOOD (power good) signal is asserted for each channel after the soft-start sequence has completed, and the output voltage is within PGOOD window ...

Page 2

... OCSET1 11 SOFT1 12 DDR 13 VIN 14 Generic Application Circuits V IN +5V TO +28V +5V ISL6227 APPLICATION CIRCUIT FOR TWO CHANNEL POWER SUPPLY V IN +5V TO 28V +5V VREF +1.25V ISL6227 APPLICATION CIRCUIT FOR COMPLETE DDR MEMORY POWER SUPPLY 2 ISL6227 28 VCC 27 LGATE2 26 PGND2 25 PHASE2 24 UGATE2 23 BOOT2 22 ISEN2 21 EN2 20 ...

Page 3

... SYMBOL TEST CONDITIONS I LGATEx, UGATEx Open, VSENx forced above CC regulation point, V > CCSN V CCU V CCD I VIN I VINS f Commercial, ISL6227C c Industrial, ISL6227I 16V (Note (Note (Note 5) ROFF ≥ 4.2V (Note RB1 IN ≤ 4.1V (Note RB2 ...

Page 4

... OCSET Sourcing Current Range EN - Low (Off High (On) Continuous-Conduction-Mode(CCM) Enforced (HYS Operation Inhibited) Automatic CCM/HYS Operation Enabled DDR - Low (Off) DDR - High (On) DDR REF Output Voltage DDR REF Output Current 4 ISL6227 SYMBOL TEST CONDITIONS V (Note 5) ST 0.0mA < I < 5.0A; 5.0V < V VOUT1 I (Note 5) VSEN ...

Page 5

... FREQUENCY MEAN 302 300 298 296 25% QUANTILE 294 292 290 288 286 - TEMPERATURE (°C) FIGURE 5. SWITCHING FREQUENCY OVER-TEMPERATURE 5 ISL6227 100 EFF EFF@ 12V 40 EFF@ 19.5V 30 EFF@ 5V, PWM 20 EFF@ 12V, PWM EFF@ 19.5V, PWM 10 0 1.00 10.0 FIGURE 2. EFFICIENCY OF CHANNEL 2, 1.8V, 1 ...

Page 6

... Vo2 FIGURE 9. LOAD TRANSIENT ( CHANNEL 2) (DIODE EMULATION MODE) Vin1 VIN1 Vo1 VO1 VO2 Vo2 FIGURE 11. INPUT STEP-UP TRANSIENT AT PWM MODE 6 ISL6227 (Continued) Vo1 VO1 VPHASE1 Vphase1 ILO1 Ilo1 VO2 Vo2 FIGURE 8. LOAD TRANSIENT ( CHANNEL 1) (FORCED PWM MODE) ...

Page 7

... FIGURE 15. SOFT-START INTERVAL AT ZERO INITIAL VOLTAGE OF VO VO1 Vo1 Vphase1 VPHASE1 ILO1 Ilo1 VO2 Vo2 FIGURE 17. OPERATION AT LIGHT LOAD OF 100mA, CHANNEL 1 7 ISL6227 (Continued) VIN1 Vin1 VO1 Vo1 Vo2 VO2 FIGURE 14. INPUT STEP-DOWN TRANSIENT AT HYS MODE EN1 EN1 PG1 PG1 SOFT1 ...

Page 8

... Vphase1 ILO1 Ilo1 VO2 Vo2 FIGURE 21. MODE TRANSITION OF HYS EN1 EN1 PG1 PG1 SOFT1 SOFT1 Vo1 VO1 FIGURE 23. SOFT SHUTDOWN INTERVAL 8 ISL6227 (Continued) VO1 Vo1 PG1 PG1 Ilo1 ILO1 Vo2 VO2 FIGURE 20. SHORT-CIRCUIT PROTECTION AT CHANNEL 1 VO1 Vo1 VPHASE2 Vphase2 Ilo2 ILO2 ...

Page 9

... FIGURE 27. VIN = 19V, LOAD STEP ON VTT, VDDQ HYS MODE, 0.14A VDDQ VDDQ Vin VIN VTT VTT OCSET2 OCSET2 FIGURE 29. INPUT LINE TRANSIENT IN DDR MODE 9 ISL6227 (Continued) VDDQ VDDQ PGOOD1 PGOOD1 VTT VTT IL1 IL1 FIGURE 26. VIN = 19V, VDDQ 3A STEP LOAD, VTT 3A LOAD VDDQ ...

Page 10

... These pins are connected to the resistive dividers that set the desired output voltage. The PGOOD, UVP, and OVP circuits use this signal to report output voltage status. 10 ISL6227 OCSET1 This pin is a buffered 0.9V internal reference voltage. A resistor from this pin to ground sets the overcurrent threshold for the first controller ...

Page 11

... PG2/REF pin. It sets the reference voltage of Channel 2 for its regulation. VCC This pin powers the controller. 11 ISL6227 Typical Application Figures 31 and 32 show the application circuits of a dual channel DC/DC converter for a notebook PC. The power supply in Figure 31 provides +2.5V and +1.8V voltages for memory and the graphics interface chipset from a +5 ...

Page 12

... VSEN2 VSEN1 PG2_REF PG2_REF VOUT2 VOUT2 PG1 U1 U1 EN1 EN2 EN2 OCSET2_VDDQ/2 SOFT1 OCSET1 SOFT2 SOFT2 Rset1 Csoft2 (N/U) 0.01µF 100k ISL6227 VCC (5V) VCC (5V) Cin2 Cin2 10µF Lo2 Lo2 V V2 (1.8V) 4.7µH Co21 Co21 Co22 220 µF 4.7 µF Cfb2 0.01µF Rfb21 10k Rfb22 ...

Page 13

Block Diagram BOOT1 UGATE1 PHASE1 ADAPTIVE DEAD-TIME DIODE EMULATION PGND1 V/I SAMPLE TIMING PWM/HYS TRANSITION LGATE1 VCC MODE CHANGE COMP 1 SAME STATE FOR 8 CLOCK CYCLES REQUIRED TO CHANGE PWM OR HYS MODE HYSTERETIC COMPARATOR 1 ΔV =15mV HYS ...

Page 14

... DDR memory chips is also provided. Initialization The ISL6227 initializes if at least one of the enable pins is set high. The Power-On Reset (POR) function continually monitors the bias supply voltage on the VCC pin, and initiates soft-start operation when EN1 or EN2 is high after the input supply voltage exceeds 4 ...

Page 15

... ISL6227 R OC FIGURE 34. OUTPUT VOLTAGE PROGRAM Operation Mode Control VOUTx pin programs the two channels of ISL6227 in two different operational modes VOUTx is connected to ground, the channel will be put into a fixed switching frequency of 300kHz CCM, also known as forced PWM mode regardless of load conditions ...

Page 16

... The PWM error amplifier is put in clamped voltage during the hysteretic mode. The output voltage through the VOUT pin and the input voltage through the VIN pin are used to 16 ISL6227 determine the error amplifier output voltage and the duty cycle. The error amplifier stays in an armed state while t waiting for the transition to occur ...

Page 17

... TABLE 1. PWM COMPARATOR RAMP AMPLITUDE FOR DUAL SWITCHER APPLICATION VIN PIN CONNECTIONS Ch1 and Ch2 Input Voltage Input voltage >4.2V Input voltage <4.2V GND 17 ISL6227 TABLE 2. PWM COMPARATOR RAMP VOLTAGE AMPLITUDE Ch1 Ch2 (EQ. 6) The small signal transfer function from the error amplifier output voltage V Equation 8: ...

Page 18

... MOSFETs. Dual-Step Conversion The ISL6227 dual channel controller can be used either in power systems with a single-stage power conversion, when . the battery power is converted into the desired output ...

Page 19

... If the overcurrent condition goes away during the 19 ISL6227 first eight clock cycles, normal operation is restored and the overcurrent circuit resets itself at the end of sixteenth clock cycles; see Figure 40. ...

Page 20

... When used in a DDR application with cascaded converters (VTT generated from VDDQ), several methods of synchronization are implemented in the ISL6227. In the DDR mode, when the DDR pin is connected to VCC, the channels operate either with 0° phase shift, when the VIN pin is connected to the GND, or with 90° ...

Page 21

... The formula in the earlier discussion assumes a 75µA sourcing current. Users can tune the sourcing 21 ISL6227 current of the ISEN pin to meet the overcurrent protection and the change the current loop gain. The lower the current sensing resistor, the higher gain of the current loop, which can damp the output LC filter more ...

Page 22

... The duty cycle of a buck converter is a function of the input voltage and output voltage. Once an output voltage is fixed, it can be written as Equation 19 --------- The switching frequency ISL6227 is 300kHz. The sw peak-to-peak ripple current going through the inductor can be written as Equation 20 – ---------------------------------------- - ...

Page 23

... I driver 23 ISL6227 Q is used because when the MOSFET drain-to-source gd voltage has fallen to zero, it gets charged. Similarly, the turn-off time can be estimated based on the gate charge and the gate drivers sinking current capability. The total power loss of the upper MOSFET is the sum of the switching loss and the conduction loss ...

Page 24

... The overvoltage test can be done on ISL6227 by connecting the VSEN pin to an external voltage source or signal generator through a diode. When the external voltage, or signal ...

Page 25

... SOFT1 and SOFT2 The soft-start capacitors should be laid out close to this pin. The other side of the soft-start cap should tie to signal ground. 25 ISL6227 PG1 and PG2/REF For dual switcher operations, these two lines are less noise sensitive. For DDR applications, a capacitor should be placed to the PG2/REF pin ...

Page 26

... CORNER REF. OPTION 4X BOTTOM VIEW SECTION "C-C" TERMINAL TIP FOR ODD TERMINAL/SIDE FOR EVEN TERMINAL/SIDE 26 ISL6227 L28.5x5 28 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE (COMPLIANT TO JEDEC MO-220VHHD-1 ISSUE SYMBOL 0. ...

Page 27

... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 27 ISL6227 ISL6227 M28.15 28 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE (0.150” ...

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