isl6263c Intersil Corporation, isl6263c Datasheet - Page 13

• Manufacturer Part Number: isl6263c
• Description: 5-bit Vid Single-phase Voltage Regulator With Current Monitor For Gpu Core Power
• Manufacturer: Intersil Corporation

Internal Bootstrap Diode
The ISL6263C has an integrated boot-strap Schottky diode
connected from the PVCC pin to the BOOT pin. Simply
adding an external capacitor across the BOOT and PHASE
pins completes the bootstrap circuit.
The minimum value of the bootstrap capacitor can be
calculated using Equation 3:
where Q
charge the gate of the upper MOSFET. The ΔV
defined as the allowable droop in the rail of the upper drive.
As an example, suppose an upper MOSFET has a gate
charge, Q
the drive voltage at the end of a PWM cycle is 200mV. One
will find that a bootstrap capacitance of at least 0.125µF is
required. The next larger standard value capacitance is
0.15µF. A good quality ceramic capacitor is recommended.
Soft-Start and Soft Dynamic VID Slew Rates
The output voltage of the converter tracks V
voltage across the SOFT and VSS pins. Shown in Figure 1,
the SOFT pin is connected to the output of the VID DAC
through the unidirectional soft-start current source I
bidirectional soft-dynamic VID current source I
non-inverting input of the error amplifier. Current is sourced
from the SOFT pin when I
both source and sink current when I
soft-start capacitor C
proportional to I
selects I
current through the output capacitors is maintained below
the OCP threshold. Once soft-start has completed, I
automatically selected for output voltage changes
commanded by the VID inputs, charging C
C
BOOT
FIGURE 7. BOOTSTRAP CAPACITANCE vs BOOT RIPPLE
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
≥
0.0
SS
GATE
----------------------- -
ΔV
GATE
20nC
Q
for the soft-start sequence so that the inrush
GATE
BOOT
0.1
VOLTAGE
is the amount of gate charge required to fully
, of 25nC at 5V and also assume the droop in
SS
0.2
Q
or I
GATE
SOFT
DVID
0.3
= 100nC
SS
ΔV
changes voltage at a rate
. The ISL6263C automatically
0.4
13
BOOT_CAP
is active. The SOFT pin can
0.5
DVID
0.6
(V)
is active. The
0.7
SOFT
SOFT,
DVID
BOOT
0.8
when the
the
SS
, and the
0.9
DVID
term is
(EQ. 3)
or the
1.0
is
ISL6263C
output voltage is commanded to rise, and discharging
C
The GPU voltage regulator may require a minimum voltage
slew rate, which will be guaranteed by the value of C
For example, if the regulator requires 10mV/µs slew rate, the
value of C
I
minimum value is specified in the “Electrical Specifications”
table on page 5. Choosing the next lower standard
component value of 0.015µF will guarantee 10mV/µs slew
rate. This choice of C
well. One should expect the output voltage during soft-start
to slew to the voltage commanded by the VID settings at a
nominal rate given by Equation 5:
Note that the slew rate is the average rate of change
between the initial and final voltage values.
It worth it to mention that the surge current charges the
output capacitors when the output voltage is commanded to
rise. This surge current could be high enough to trigger the
OC protection circuit if the voltage slew rate is too high,
or/and the output capacitance is too large. The overcurrent
set point should guarantee the VID code transition
successful.
RBIAS Current Reference
The RBIAS pin is internally connected to a 1.545V reference
through a 3kΩ resistance. A bias current is established by
connecting a ±1% tolerance, 150kΩ resistor between the
RBIAS and VSS pins. This bias current is mirrored, creating the
reference current I
Do not connect any other components to this pin, as they will
have a negative impact on the performance of the IC.
Setting the PWM Switching Frequency
The R
architecture, lacking a fixed-frequency clock signal to
produce PWM. The switching frequency increases during
the application of a load to improve transient performance.
The static PWM frequency varies slightly depending on the
input voltage, output voltage, and output current, but this
variation is normally less than 10% in continuous conduction
mode.
Refer to Figure 2 and find that resistor R
between the V W and COMP pins. A current is sourced from
VW through R
voltage signal V
frequency. The relationship between the resistance of R
dV
---------------------- -
C
DVID
SOFT
SOFT
SOFT
dt
3
is the soft-dynamic VID current source, and its
when the output voltage is commanded to fall.
modulator scheme is not a fixed-frequency
=
=
I
------------------------ -
SOFT
⎛
⎝
DVIDmin
------------------ -
C
10mV
--------------- -
SOFT
I
μs
SS
FSET
W
can be calculated using Equation 4:
⎞
⎠
, which determines the PWM switching
OCSET
=
=
creating the synthetic ripple window
---------------------- -
0.015μF
180μA
----------------- -
SOFT
42μA
10K
that is sourced from the OCSET pin.
controls the startup slew-rate as
=
≈
0.018μF
2.8mV
----------------- -
μs
FSET
is connected
July 31, 2008
SOFT
(EQ. 4)
FN6745.0
(EQ. 5)
FSET
.