LDS-L9D340G64BG2 LOGIC Devices Incorporated, LDS-L9D340G64BG2 Datasheet - Page 125

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LDS-L9D340G64BG2

Manufacturer Part Number
LDS-L9D340G64BG2
Description
4.0 Gb, Ddr3, 64 M X 64 Integrated Module Imod
Manufacturer
LOGIC Devices Incorporated
Datasheet
LOGIC Devices Incorporated
F
F
IGURE
IGURE
Command 1
DQS, DQS#
Add ress 2
Command 1
DQS, DQS#
Address 2
77 - C
C K#
DQ 3
78 - C
C K
C K#
DQ 3
C K
WRITE
Valid
WRITE
T0
Vali d
T0
ONSECUTIVE
ONSECUTIVE
Notes:
Notes:
NOP
T1
NOP
T1
www.logicdevices.com
t CCD
1. NOP commands are shown for ease of illustration; other commands may be valid at these times.
2. The BL8 setting is activated by either MR0[1:0] = 00 or MR0[1:0] = 01 and A12 = 1 during the WRITE commands at
3. DI n (or b) = data-in for column n (or column b).
4. BL8, WL = 5 (AL = 0, CWL = 5).
t CCD
1. NOP commands are shown for ease of illustration; other commands may be valid at these times.
2. BC4, WL = 5 (AL = 0, CWL = 5).
3. DI n (or b) = data-in for column n (or column b).
4. The BC4 setting is activated by MR0[1:0] = 01 and A12 = 0 during the WRITE command at T0 and T4.
NOP
T2
NOP
T2
WRITE (BL8)
WRITE (BC4)
T0 and T4.
WL = 5
WL = 5
NOP
T3
NOP
T3
WRITE
Valid
WRITE
T4
Vali d
T4
t WPRE
t WPRE
TO
TO
WRITE (BL8)
NOP
WRITE (BC4)
T5
DI
n
NOP
T5
DI
n
n + 1
DI
n + 1
DI
4.0 Gb, DDR3, 64 M x 64 Integrated Module (IMOD)
NOP
n + 2
T6
DI
NOP
n + 2
T6
DI
n + 3
WL = 5
DI
n + 3
WL = 5
DI
t WPST
n + 4
NOP
T7
DI
NOP
T7
VIA
n + 5
DI
MRS
NOP
n + 6
T8
NOP
DI
T8
PRELIMINARY INFORMATION
t WPRE
n + 7
DI
OR
NOP
DI
NOP
T9
DI
b
T9
b
High Performance, Integrated Memory Module Product
OTF
b + 1
b + 1
DI
DI
T10
NOP
b + 2
T10
NOP
b + 2
DI
DI
t BL = 4 clocks
b + 3
b + 3
DI
DI
t WPST
t BL = 4 clo cks
NOP
b + 4
T11
T11
NOP
DI
b + 5
DI
NOP
b + 6
T12
T12
NOP
DI
L9D340G64BG2
b + 7
Transitioning Data
DI
Transitioning Data
t WPST
Jun 08, 2010 LDS-L9D340G64BG2-B
NOP
T13
T13
NOP
t WR
t WTR
t WR
t WTR
Don ’t Care
Don ’t Care
NOP
NOP
T14
T14

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