adns-6030 Avago Technologies, adns-6030 Datasheet - Page 13

• Manufacturer Part Number: adns-6030
• Description: Low Power Laser Mouse Bundles - Agilent Hewlett-packard
• Manufacturer: Avago Technologies

AC Electrical Specifications
Electrical Characteristics over recommended operating conditions. Typical values at 25 °C, V
13
Parameter
Motion delay after
reset
Shutdown
shutdown
Forced Rest enable
Rest
MISO rise time
MISO fall time
MISO delay after
SCLK
MISO hold time
MOSI hold time
MOSI setup time
SPI time between
SPI time between
commands
SPI time between
read and
subsequent
commands
SPI read address-
data delay
NCS inactive after
motion burst
NCS to SCLK active t
SCLK to NCS
inactive (for read
operation)
SCLK to NCS
inactive (for write
operation)
NCS to MISO high-Z t
MOTION rise time
MOTION fall time
Current
Wake from
Wake from Forced
write commands
write and read
Transient Supply
Symbol
I
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
DDT
MOT-RST
STDWN
WAKEUP
REST-EN
REST-DIS
r-MISO
f-MISO
DLY-MISO
hold-MISO
hold-MOSI
setup-MOSI
SWW
SWR
SRW
SRR
SRAD
BEXIT
NCS-SCLK
SCLK-NCS
SCLK-NCS
NCS-MISO
r-MOTION
f-MOTION
Minimum
120
120
120
23
0.5
200
30
20
500
4
500
20
150
150
150
150
Typical
Maximum Units
1
1
120
1/f
23
50
300
300
500
300
300
30
SCLK
ms
ms
ms
ns
ns
ns
us
ns
ns
s
s
ns
s
ns
ns
ns
s
ns
ns
ns
mA
s
s
Minimum NCS inactive time after motion burst
Max supply current during a V
Notes
From SW_RESET register write to valid motion,
assuming motion is present
From Shutdown mode active to low current
From Shutdown mode inactive to valid motion.
Notes: A RESET must be asserted after a shutdown.
Refer to section "Notes on Shutdown and Forced
Rest", also note t
From RESTEN bits set to low current
From RESTEN bits cleared to valid motion
C
C
From SCLK falling edge to MISO data valid, no load
conditions
Data held until next falling SCLK edge
From data valid to SCLK rising edge
From rising SCLK for last bit of the first data byte, to
rising SCLK for last bit of the second data byte.
From rising SCLK for last bit of the first data byte, to
rising SCLK for last bit of the second address byte.
From rising SCLK for last bit of the first data byte, to
From rising SCLK for last bit of the address byte, to
before next SPI usage
From NCS falling edge to first SCLK rising edge
From last SCLK rising edge to NCS rising edge, for
From last SCLK rising edge to NCS rising edge, for
From NCS rising edge to MISO high-Z state
C
C
Amount of time data is valid after SCLK rising edge
falling SCLK for the first bit of the address byte of
the next command.
falling SCLK for first bit of data being read.
valid MISO data transfer
valid MOSI data transfer
L
L
L
L
= 100pF
= 100pF
= 100pF
= 100pF
MOT-RST
DD
=2.8V.
DD
ramp from 0 to 2.8V