lt1810 Linear Technology Corporation, lt1810 Datasheet - Page 15

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lt1810

Manufacturer Part Number
lt1810
Description
Single/dual 180mhz, 350v/?s Rail-to-rail Input And Output Low Distortion Op Amps
Manufacturer
Linear Technology Corporation
Datasheet

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ALTERA
0
APPLICATIO S I FOR ATIO
Rail-to-Rail Characteristics
The LT1809/LT1810 have an input and output signal
range that includes both negative and positive power
supply. Figure 1 depicts a simplified schematic of the
amplifier. The input stage is comprised of two differential
amplifiers, a PNP stage Q1/Q2 and a NPN stage Q3/Q4
that are active over different ranges of common mode
input voltage. The PNP differential pair is active for
common mode voltages between the negative supply to
approximately 1.5V below the positive supply. As the
input voltage moves closer toward the positive supply,
the transistor Q5 will steer the tail current I
mirror Q6/Q7, activating the NPN differential pair and
causing the PNP pair to become inactive for the rest of the
input common mode range up to the positive supply.
A pair of complementary common emitter stages
Q14/Q15 form the output stage, enabling the output to
swing from rail-to-rail. The capacitors C1 and C2 form the
local feedback loops that lower the output impedance at
high frequency. These devices are fabricated on Linear
Technology’s proprietary high speed complementary
bipolar process.
SHDN
V
V
+
V
V
+
ESDD5
ESDD6
D9
R6
10k
R7
100k
U
Q16
GENERATION
BIAS
U
Q17
ESDD1
ESDD4
+IN
–IN
V
V
+
W
V
V
+
Figure 1. LT1809 Simplified Schematic Diagram
ESDD2
ESDD3
D6
D5
1
to the current
D8
D7
U
Q4
Q7
D1
D2
Q3
Power Dissipation
The LT1809/LT1810 amplifiers combine high speed with
large output current in a small package, so there is a need
to ensure that the die’s junction temperature does not
exceed 150 C. The LT1809 is housed in an SO-8 package
or a 6-lead SOT-23 package and the LT1810 is in an SO-8
or 8-lead MSOP package. All packages have the V
pin fused to the lead frame to enhance the thermal conduc-
tance when connecting to a ground plane or a large metal
trace. Metal trace and plated through-holes can be used to
spread the heat generated by the device to the backside of
the PC board. For example, on a 3/32" FR-4 board with 2oz
copper, a total of 660 square millimeters connected to
Pin 4 of LT1810 in an SO-8 package (330 square millime-
ters on each side of the PC board) will bring the thermal
resistance,
trace connected to the V
thermal resistance will be around 105 C/W. More infor-
mation on thermal resistance for all packages with various
metal areas connecting to the V
1, 2 and 3 for thermal consideration.
Q5
Q6
V
BIAS
Q1
D3
D4
Q2
I
JA
1
, to about 85 C/W. Without extra metal
Q10
Q11
Q9
R3
R1
pin to provide a heat sink, the
Q12
LT1809/LT1810
Q8
R4
R2
pin is provided in Tables
C
C
V
Q13
OUTPUT BIAS
R5
BUFFER
I
2
AND
C2
C1
1809 F01
15
supply
Q15
Q14
OUT

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