ltc1751 Linear Technology Corporation, ltc1751 Datasheet - Page 9

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ltc1751

Manufacturer Part Number
ltc1751
Description
Micropower, Regulated Charge Pump Dc/dc Converters
Manufacturer
Linear Technology Corporation
Datasheet

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APPLICATIO S I FOR ATIO
There are several ways to reduce output voltage ripple.
For applications requiring V
applications requiring < 100mV of peak-to-peak ripple, a
larger C
A larger capacitor will reduce both the low and high
frequency ripple due to the lower charging and discharg-
ing slew rates as well as the lower ESR typically found
with higher value (larger case size) capacitors. A low ESR
ceramic output capacitor will minimize the high fre-
quency ripple, but will not reduce the low frequency
ripple unless a high capacitance value is used. An R-C
filter may also be used to reduce high frequency voltages
spikes (see Figure 1).
Note that when using a larger output capacitor the mini-
mum turn-on time of the device will increase.
Soft-Start
The LTC1751 family has built-in soft-start circuitry to
prevent excessive current flow at V
soft-start time is programmed by the value of the capacitor
at the SS pin. Typically a 2 A current is forced out of SS
causing a ramp voltage on the SS pin. The regulation loop
follows this ramp voltage until the output reaches the
correct regulation level. SS is automatically pulled to
ground whenever SHDN is low. The typical rise time is
given by the expression:
For example, with a 4.7nF capacitor the 10% to 90% rise
time will be approximately 2.8ms. If the output charge
storage capacitor is 10 F, then the average output current
for an LTC1751-5 will be 4V/2.8ms • 10 F or 14mA, giving
28mA at the V
The soft-start feature is optional. If there is no capacitor
on SS, the output voltage of the LTC1751 will ramp up as
quickly as possible. The start-up time will depend on
t
r
= 0.6ms/nF • C
OUT
Figure 1. Output Ripple Reduction Technique
capacitor (22 F or greater) is recommended.
LTC1751-X
IN
pin.
V
OUT
U
SS
+
U
10 F
TANT
1
IN
+
to exceed 3.3V or for
IN
W
10 F
TANT
during start-up. The
1751 F01
V
5V
OUT
U
LTC1751/LTC1751-3.3/LTC1751-5
various parameters such as temperature, output loading,
charge pump and flying capacitor values and input
voltage.
PGOOD and Undervoltage Detection
The PGOOD pin on the LTC1751-3.3/LTC1751-5 performs
two functions. On start-up, it indicates when the output
has reached its final regulation level. After start-up, it
indicates when a fault condition, such as excessive load-
ing, has pulled the output out of regulation.
Once the LTC1751-3.3/LTC1751-5 are enabled via the
SHDN pin, V
by following the SS pin. The PGOOD pin switches from low
impedance to high impedance after V
regulation value. If V
correct regulation level, the PGOOD pin pulls low again
indicating that a fault exists. Alternatively, if there is a short
circuit on V
regulation level, the PGOOD pin will remain low. The lower
fault threshold, UVL, is preprogrammed to recognize
errors of – 7% below nominal V
threshold, UVH, is preprogrammed at – 4.5% below nomi-
nal. Figure 2 shows an example of the PGOOD pin with a
normal start-up followed by an undervoltage fault.
Using an external pull-up resistor, the PGOOD pin can be
pulled high from any available voltage supply, including
the LTC1751-3.3/LTC1751-5 V
If PGOOD is not used it may be connected to GND.
PGOOD
SHDN
V
Figure 2. PGOOD During Start-Up and Undervoltage
OUT
90%
10%
OUT
OUT
preventing it from ever reaching its correct
ramps to its final regulation value slowly
OUT
is subsequently pulled below its
t
r
TIME
OUT
UVL
OUT
pin.
. The upper fault
OUT
reaches its
17515 F02
UVH
9

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