mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 244

• Manufacturer Part Number: mcf5272
• Description: Mcf5272 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

Programming Model
Table 11-16 describes the FRBR fields.
11.5.10 FIFO Receive Start Register (FRSR)
The FRSR register, Figure 11-13, is programmed by the user to indicate the starting address
of the receive FIFO. FRSR marks the boundary between the transmit and receive FIFOs.
The transmit FIFO uses addresses from TFSR to FRSR - 4. The receive FIFO uses
addresses from FRSR to FRBR - 4. The value in this register must be added to MBAR +
0x800 to determine the absolute address.
FRSR needs to be written only to change the default value.
11-20
31–11
10–2
Bits
1–0
Reset
Reset
Reset
Reset
Field
Field
Addr
Field
Field
Addr
R/W
R/W
R/W
R/W
R_BOUND
Name
31
15
31
15
—
—
Figure 11-12. FIFO Receive Bound Register (FRBR)
0000_0
0000_0
Figure 11-13. FIFO Receive Start Register (FRSR)
—
—
Reserved, should be cleared.
End of FIFO RAM. This field contains the ending address of the FIFO RAM, exclusive.
Reserved, should be cleared.
Table 11-16. FRBR Field Descriptions
11
11
10
10
1
1
MCF5272 User’s Manual
9
0000_0000_0000_0000
0000_0000_0000_0000
MBAR + 0x8D0
MBAR + 0x884
Read/Write
Read/Write
Read only
Read only
110_0000_00
—
—
R_BOUND
01_0000_00
Description
R_FSTART
2
2
1
1
00
00
—
—
MOTOROLA
16
16
0
0