mcf5249pb Freescale Semiconductor, Inc, mcf5249pb Datasheet - Page 6

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mcf5249pb

Manufacturer Part Number
mcf5249pb
Description
Mcf5249 Integrated Coldfire Microprocessor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
160 MAPBGA Ball Assignments
1.4
The following signals are not available on the 144 QFP package.
6
Dual I
— Interchip bus interface for EEPROMs, LCD controllers, A/D converters, keypads
— Master and slave modes, support for multiple masters
— Automatic interrupt generation with programmable level
System debug support
— Real-time instruction trace for determining dynamic execution path
— Background debug mode (BDM) for debug features while halted
— Debug exception processing capability
— Real-time debug support
System Interface
— Glueless bus interface and DRAMC support for interface to 16-bit for DRAM, SRAM, ROM,
— Two programmable chip-select signals for static memories or peripherals with programmable
— Two dedicated chip selects for 16-bit wide DRAM/SDRAM.
— Two dedicated chip selects (CS2 and CS3) are used for the IDE and/or SmartMedia interface
— Programmable interrupt controller (low interrupt latency, eight external interrupt requests,
— 44 programmable general-purpose inputs (for the 160 MAPBGA package)
— 46 programmable general-purpose outputs (for the 160 MAPBGA package)
— IEEE 1149.1 Test (JTAG) Module
Clocking
— Clock-multiplied PLL, programmable frequency
1.8V core, 3.3V I/O
160 pin MAPBGA package (qualified at 140 MHz) and 144 pin QFP package (qualified at 120
MHz)
160 MAPBGA Ball Assignments
FLASH, and I/O devices
wait states and port sizes.
CS0 is active after reset to provide boot-up from external FLASH/ROM.
programmable autovector generator)
2
C Interfaces
The 144 QFP part is qualified for 120 MHz operation. The 160 MAPBGA
part is qualified for 140 MHz.
MCF5249 Integrated ColdFire® Microprocessor Product Brief
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
NOTE
MOTOROLA

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