ltc3851-1 Linear Technology Corporation, ltc3851-1 Datasheet - Page 20

• Manufacturer Part Number: ltc3851-1
• Description: Synchronous Step-down Switching Regulator Controller
• Manufacturer: Linear Technology Corporation

LTC3851-1
APPLICATIONS INFORMATION
The loop fi lter components, C
the current pulses from the phase detector and provide
a stable input to the voltage-controlled oscillator. The
fi lter components C
loop acquires lock. Typically R
2200pF to 0.01μF .
When the external oscillator is active before the LTC3851
is enabled, the internal oscillator frequency will track the
external oscillator frequency as described in the preceding
paragraphs. In situations where the LTC3851 is enabled
before the external oscillator is active, a low free-running
oscillator frequency of approximately 50kHz will result. It
is possible to increase the free-running, pre-synchroniza-
tion frequency by adding a second resistor in parallel with
R
the LTC3851-1 is capable of turning on the top MOSFET.
It is determined by internal timing delays and the gate
charge required to turn on the top MOSFET. Low duty
cycle applications may approach this minimum on-time
limit and care should be taken to ensure that:
If the duty cycle falls below what can be accommodated
by the minimum on-time, the controller will begin to skip
cycles. The output voltage will continue to be regulated,
but the ripple voltage and current will increase.
The minimum on-time for the LTC3851-1 is approximately
90ns. However, as the peak sense voltage decreases the
minimum on-time gradually increases. This is of particu-
lar concern in forced continuous applications with low
ripple current at light loads. If the duty cycle drops below
the minimum on-time limit in this situation, a signifi cant
difference between the internal and external oscillator
signals. The magnitude of the phase difference is inversely
proportional to the value of the second resistor.
The external clock (on MODE/PLLIN pin) input high
threshold is nominally 1.6V, while the input low thres hold
is nominally 1.2V.
Minimum On-Time Considerations
Minimum on-time t
20
LP
t
ON MIN
and C
(
LP
)
<
. The second resistor will also cause a phase
V f
V
IN
OUT
( )
ON(MIN)
LP
and R
is the smallest time duration that
LP
LP
LP
determine how fast the
is 1k to 10k and C
and R
LP
, smooth out
LP
is
amount of cycle skipping can occur with correspondingly
larger current and voltage ripple.
Effi ciency Considerations
The percent effi ciency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the effi ciency and which change would
produce the most improvement. Percent effi ciency can
be expressed as:
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of
the losses in LTC3851-1 circuits: 1) IC V
INTV
transition losses.
1. The V
2. INTV
3. I
%Effi ciency = 100% – (L1 + L2 + L3 + ...)
Electrical Characteristics table, which excludes MOSFET
driver current. V
(<0.1%) loss.
control currents. The MOSFET driver current results
from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge dQ moves
from INTV
out of INTV
control circuit current. In continuous mode, I
= f(Q
the topside and bottom side MOSFETs.
the fuse (if used), MOSFET, inductor and current sense
resistor. In continuous mode, the average output current
fl ows through L and R
the topside MOSFET and the synchronous MOSFET. If
the two MOSFETs have approximately the same R
then the resistance of one MOSFET can simply be
summed with the resistances of L and R
tain I
2
R losses are predicted from the DC resistances of
CC
regulator current, 3) I
CC
2
T
IN
R losses. For example, if each R
+ Q
current is the sum of the MOSFET driver and
current is the DC supply current given in the
B
CC
), where Q
CC
to ground. The resulting dQ/dt is a cur rent
that is typically much larger than the
IN
current typi cally results in a small
T
SENSE
and Q
2
R losses, 4) topside MOSFET
, but is “chopped” between
B
are the gate charges of
DS(ON)
IN
SENSE
current, 2)
= 10mΩ,
GATECHG
DS(ON)
to ob-
38511f
,