ltc3827ig-1 Linear Technology Corporation, ltc3827ig-1 Datasheet - Page 14

• Manufacturer Part Number: ltc3827ig-1
• Description: Low Iq, Dual, 2-phase Synchronous Step-down Controller
• Manufacturer: Linear Technology Corporation

APPLICATIO S I FOR ATIO
LTC3827-1
core material saturates “hard,” which means that induc-
tance collapses abruptly when the peak design current is
exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
Power MOSFET and Schottky Diode (Optional)
Selection
Two external power MOSFETs must be selected for each
controller in the LTC3827-1: one N-channel MOSFET for
the top (main) switch, and one N-channel MOSFET for the
bottom (synchronous) switch.
The peak-to-peak drive levels are set by the INTV
voltage. This voltage is typically 5V during start-up
(see EXTV
threshold MOSFETs must be used in most applications.
The only exception is if low input voltage is expected
(V
(V
BV
logic level MOSFETs are limited to 30V or less.
Selection criteria for the power MOSFETs include the “ON”
resistance R
age and maximum output current. Miller capacitance,
C
usually provided on the MOSFET manufacturers’ data
sheet. C
the horizontal axis while the curve is approximately flat
divided by the specified change in V
multiplied by the ratio of the application applied V
Gate charge curve specified V
in continuous mode the duty cycles for the top and bottom
MOSFETs are given by:
14
MILLER
IN
GS(TH)
DSS
Main Switch Duty Cycle
Synchronous Switch Duty Cycle
< 5V); then, sub-logic level threshold MOSFETs
specification for the MOSFETs as well; most of the
, can be approximated from the gate charge curve
MILLER
< 3V) should be used. Pay close attention to the
CC
DS(ON)
Pin Connection). Consequently, logic-level
is equal to the increase in gate charge along
, Miller capacitance C
U
U
=
DS
V
. When the IC is operating
V
OUT
IN
W
DS
=
. This result is then
MILLER
V
IN
–
V
IN
V
, input volt-
OUT
U
DS
to the
CC
The MOSFET power dissipations at maximum output
current are given by:
where δ is the temperature dependency of R
R
at the MOSFET’s Miller threshold voltage. V
typical MOSFET minimum threshold voltage.
Both MOSFETs have I
equation includes an additional term for transition losses,
which are highest at high input voltages. For V
high current efficiency generally improves with larger
MOSFETs, while for V
increase to the point that the use of a higher R
with lower C
synchronous MOSFET losses are greatest at high input
voltage when the top switch duty factor is low or during a
short-circuit when the synchronous switch is on close to
100% of the period.
The term (1+δ) is generally given for a MOSFET in the form
of a normalized R
δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs.
The optional Schottky diodes D3 and D4 shown in Fig-
ure 14 conduct during the dead-time between the conduc-
tion of the two power MOSFETs. This prevents the body
diode of the bottom MOSFET from turning on, storing charge
during the dead-time and requiring a reverse recovery
period that could cost as much as 3% in efficiency at high
V
for both regions of operation due to the relatively small
average current. Larger diodes result in additional transi-
tion losses due to their larger junction capacitance.
IN
DR
P
P
. A 1A to 3A Schottky is generally a good compromise
MAIN
SYNC
(approximately 2Ω) is the effective driver resistance
=
=
( )
⎡
⎢
⎣
V
V
MILLER
V
V
IN
INTVCC
V
OUT
IN
IN
2
–
V
⎛
⎜
⎝
IN
( )
I
V
I
MAX
actually provides higher efficiency. The
MAX
OUT
2
1
–
DS(ON)
2
IN
R losses while the topside N-channel
V
⎞
⎟
⎠
THMIN
> 20V the transition losses rapidly
( )
2
( )(
I
R
MAX
( )
1
DR
+
vs Temperature curve, but
δ
+
2
C
( )
R
1 δ
V
MILLER
+
DS ON
THMIN
1
(
R
)
DS ON
)
⎤
⎥
⎦
+
( )
•
f
(
DS(ON)
THMIN
IN
)
DS(ON)
< 20V the
device
is the
38271fd
and