ltc3890-1 Linear Technology Corporation, ltc3890-1 Datasheet - Page 26

• Manufacturer Part Number: ltc3890-1
• Description: 60v Low Iq, Dual, 2-phase Synchronous Step-down Dc/dc Controller
• Manufacturer: Linear Technology Corporation

LTC3890-1
Design Example
As a design example for one channel, assume V
12V(nominal), V
V
The inductance value is chosen fi rst based on a 30% ripple
current assumption. The highest value of ripple current
occurs at the maximum input voltage. Tie the FREQ pin
to GND, generating 350kHz operation. The minimum
inductance for 30% ripple current is:
A 4.7μH inductor will produce 29% ripple current. The
peak inductor current will be the maximum DC value plus
one half the ripple current, or 5.73A. Increasing the ripple
current will also help ensure that the minimum on-time
of 95ns is not violated. The minimum on-time occurs at
maximum V
The equivalent R
using the minimum value for the maximum current sense
threshold (43mV):
Choosing 1% resistors: R
an output voltage of 3.32V.
The power dissipation on the topside MOSFET can be easily
estimated. Choosing a Fairchild FDS6982S dual MOSFET
results in: R
maximum input voltage with T(estimated) = 50°C:
APPLICATIONS INFORMATION
26
SENSE(MAX)
R
P
t
ON MIN
MAIN
SENSE
I
L
(
=
( )
=
V
f
)
OUT
≤
(
DS(ON)
3.3V
=
22V
IN
( )
0.035
5V – 2.3V
= 75mV and f = 350kHz.
L
5.73A
64mV
:
V
IN MAX
IN
SENSE
1–
(
( )
1
V
5A
= 0.035Ω/0.022Ω, C
= 22V (max), V
OUT
V
≈ 0.01Ω
)
+ 22V
IN(NOM)
)
2
V
resistor value can be calculated by
( )
+
OUT
( )
f
1+ 0.005
2.3V
A
=
(
1
= 25k and R
22 350
2
V
5A
(
2
350kHz
3 3
(
OUT
.
)
(
(
2.5
50°C – 25°C
V
= 3.3V, I
kHz
MILLER
B
)
)
)
= 78.7k yields
= 331mW
(
215pF
=
= 215pF. At
429
MAX
)
ns
)
= 5A,
•
IN
=
A short-circuit to ground will result in a folded back cur-
rent of:
with a typical value of R
= 0.125. The resulting power dissipated in the bottom
MOSFET is:
which is less than under full-load conditions.
C
temperature assuming only this channel is on. C
chosen with an ESR of 0.02Ω for low output ripple. The
output ripple in continuous mode will be highest at the
maximum input voltage. The output voltage ripple due to
ESR is approximately:
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the IC. These items are also illustrated graphically in the
layout diagram of Figure 11. Figure 12 illustrates the current
waveforms present in the various branches of the 2-phase
synchronous regulators operating in the continuous mode.
Check the following in your layout:
1. Are the top N-channel MOSFETs MTOP1 and MTOP2
2. Are the signal and power grounds kept separate? The
IN
V
located within 1cm of each other with a common drain
connection at C
decoupling for the two channels as it can cause a large
resonant loop.
combined IC signal ground pin and the ground return
of C
nals. The path formed by the top N-channel MOSFET,
Schottky diode and the C
I
P
SC
is chosen for an RMS current rating of at least 3A at
SYNC
ORIPPLE
=
INTVCC
0.01
34mV
= 250mW
= 3.18A
(
= R
must return to the combined C
ESR
–
2
1
IN
)
(ΔI
2
? Do not attempt to split the input
95ns 22V
(
1.125
L
) = 0.02Ω(1.45A) = 29mV
4.7μH
DS(ON)
( )
IN
)
capacitor should have short
(
0.022Ω
and δ = (0.005/°C)(25°C)
= 3.18A
)
OUT
(–) termi-
P-P
OUT
38901f
is