ltc3729euh-trpbf Linear Technology Corporation, ltc3729euh-trpbf Datasheet - Page 23

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ltc3729euh-trpbf

Manufacturer Part Number
ltc3729euh-trpbf
Description
550khz, Polyphase, High Efficiency, Synchronous Step-down Switching Regulator
Manufacturer
Linear Technology Corporation
Datasheet
APPLICATIO S I FOR ATIO
which is much less than normal, full-load conditions.
Incidentally, since the load no longer dissipates power in
the shorted condition, total system power dissipation is
decreased by over 99%.
The duty cycles when the peak RMS input current occurs
is at D = 0.25 and D = 0.75 according to Figure 4. Calculate
the worst-case required RMS input current rating at the
input voltage, which is 5.5V, that provides a duty cycle
nearest to the peak.
From Figure 4, C
The output capacitor ripple current is calculated by using
the inductor ripple already calculated for each inductor
and multiplying by the factor obtained from Figure 3 along
with the calculated duty factor. The output ripple in
continuous mode will be highest at the maximum input
voltage. From Figure 3, the maximum output current ripple
is:
Note that the PolyPhase technique will have its maximum
benefit for input and output ripple currents when the
number of phases times the output voltage is approxi-
mately equal to or greater than the input voltage.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3729. These items are also illustrated graphically in
the layout diagram of Figure 11. Check the following in
your layout:
C required I
IN
I
I
COUT
COUTMAX
V
OUT
fL
RMS
IN
300
will require an RMS current rating of:
U
0 34
1 8 0 34
.
.
kHz
4 6
20
.
U
.
A
A
2
RMS
0 23
H
.
W
1
A
U
1) Are the signal and power grounds segregated? The
LTC3729 signal ground pin should return to the (–) plate
of C
sources of the bottom N-channel MOSFETs, anodes of the
Schottky diodes, and (–) plates of C
as short lead lengths as possible.
2) Does the LTC3729 V
of C
plate(s) of C
connected between the V
any feedforward capacitor across R1 should be as close as
possible to the LTC3729.
3) Are the SENSE
minimum PC trace spacing? The filter capacitors between
SENSE
possible to the LTC3729. Ensure accurate current sensing
with Kelvin connections to the sense resistors.
4) Do the (+) plates of C
topside MOSFETs as closely as possible? This capacitor
provides the AC current to the MOSFETs. Keep the input
current path formed by the input capacitor, top and bottom
MOSFETs, and the Schottky diode on the same side of the
PC board in a tight loop to minimize conducted and
radiated EMI.
5) Is the INTV
nected closely between INTV
This capacitor carries the MOSFET driver peak currents. A
small value is used to allow placement immediately adja-
cent to the IC.
6) Keep the switching nodes, SW1 (SW2), away from
sensitive small-signal nodes. Ideally the switch nodes
should be placed at the furthest point from the LTC3729.
7) Use a low impedance source such as a logic gate to drive
the PLLIN pin and keep the lead as short as possible.
8) Minimize the capacitive load on the CLKOUT pin to
minimize excess phase shift. Buffer if necessary with an
NPN emitter follower.
OUT
OUT
+
? Does the LTC3729 V
separately. The power ground returns to the
and SENSE
OUT
CC
? The resistive divider R1, R2 must be
1 F ceramic decoupling capacitor con-
and SENSE
OS
pin pairs should be as close as
IN
+
DIFFOUT
pin connect to the (+) plate(s)
connect to the drains of the
CC
+
OS
and the power ground pin?
leads routed together with
and signal ground and
pin connect to the (–)
IN
, which should have
LTC3729
sn3729 3729fas
23

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