ltc3566 Linear Technology Corporation, ltc3566 Datasheet - Page 26

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ltc3566

Manufacturer Part Number
ltc3566
Description
High Ef?ciency Usb Power Manager Plus 1a Buck-boost Converter
Manufacturer
Linear Technology Corporation
Datasheet

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APPLICATIONS INFORMATION
Figure 8. Higher Frequency Ground Currents Follow Their Incident
Path. Slices in the Ground Plane Cause High Voltage and Increased
Emissions.
and that there be an unbroken ground plane under the
LTC3566 and all of its external high frequency components.
High frequency currents, such as the V
currents on the LTC3566, tend to fi nd their way along the
ground plane in a myriad of paths ranging from directly
back to a mirror path beneath the incident path on the
top of the board. If there are slits or cuts in the ground
plane due to other traces on that layer, the current will be
forced to go around the slits. If high frequency currents are
not allowed to fl ow back through their natural least-area
path, excessive voltage will build up and radiated emis-
sions will occur. There should be a group of vias under
the grounded backside of the package leading directly
down to an internal ground plane. To minimize parasitic
inductance, the ground plane should be on the second
layer of the PC board.
The GATE pin for the external ideal diode controller has
extremely limited drive current. Care must be taken to
minimize leakage to adjacent PC board traces. 100nA of
leakage from this pin will introduce an offset to the 15mV
ideal diode of approximately 10mV. To minimize leakage,
the trace can be guarded on the PC board by surrounding
it with V
less than one volt higher than GATE.
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3566.
LTC3566
26
OUT
connected metal, which should generally be
BUS
3566 F08
, V
IN1
, and V
OUT1
1. Are the capacitors at V
as possible to the LTC3566? These capacitors provide
the AC current to the internal power MOSFETs and their
drivers. Minimizing inductance from these capacitors to
the LTC3566 is a top priority.
2. Are C
returns current to the GND plane, and then back to C
3. Keep sensitive components away from the SW pins.
Battery Charger Stability Considerations
The LTC3566’s battery charger contains both a constant-
voltage and a constant-current control loop. The constant-
voltage loop is stable without any compensation when a
battery is connected with low impedance leads. Excessive
lead length, however, may add enough series inductance
to require a bypass capacitor of at least 1μF from BAT to
GND. Furthermore, when the battery is disconnected, a
4.7μF capacitor in series with a 0.2Ω to 1Ω resistor from
BAT to GND is required to keep ripple voltage low.
High value, low ESR multilayer ceramic chip capacitors
reduce the constant-voltage loop phase margin, possibly
resulting in instability. Ceramic capacitors up to 22μF may
be used in parallel with a battery, but larger ceramics should
be decoupled with 0.2Ω to 1Ω of series resistance.
In constant-current mode, the PROG pin is in the feed-
back loop rather than the battery voltage. Because of the
additional pole created by any PROG pin capacitance,
capacitance on this pin must be kept to a minimum. With
no additional capacitance on the PROG pin, the battery
charger is stable with program resistor values as high
as 25k. However, additional capacitance on this node
reduces the maximum allowed program resistor. The pole
frequency at the PROG pin should be kept above 100kHz.
Therefore, if the PROG pin has a parasitic capacitance,
C
the maximum resistance value for R
PROG
R
PROG
, the following equation should be used to calculate
OUT
and L1 closely connected? The (-) plate of C
2π • 100kHz • C
1
BUS
PROG
, V
IN1
, and V
PROG
:
OUT1
as close
IN
3566p
OUT
.

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