ltc4268cdkd-1-trpbf Linear Technology Corporation, ltc4268cdkd-1-trpbf Datasheet - Page 44
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ltc4268cdkd-1-trpbf
Manufacturer Part Number
ltc4268cdkd-1-trpbf
Description
High Power Pd With Synchronous Noopto Flyback Controller
Manufacturer
Linear Technology Corporation
Datasheet
1.LTC4268CDKD-1-TRPBF.pdf
(48 pages)
LTC4268-1
APPLICATIONS INFORMATION
ISOLATION
The 802.3 standard requires Ethernet ports to be electrically
isolated from all other conductors that are user accessible.
This includes the metal chassis, other connectors and
any auxiliary power connection. For PDs, there are two
common methods to meet the isolation requirement. If
there will be any user accessible connection to the PD,
then an isolated DC/DC converter is necessary to meet
the isolation requirements. If user connections can be
avoided, then it is possible to meet the safety requirement
by completely enclosing the PD in an insulated housing.
In all PD applications, there should be no user accessible
electrical connections to the LTC4268-1 or support circuitry
other than the RJ-45 port.
LAYOUT CONSIDERATIONS FOR THE LTC4268-1
The LTC4268-1’s PD front end is relatively immune to
layout problems. Excessive parasitic capacitance on the
R
to which the exposed pad on the bottom of the package
can be soldered. This heatsink should be electrically
connected to GND. For optimum thermal performance,
make the heat sink as large as possible. Voltages in a
PD can be as large as –57V for PoE applications, so
high voltage layout techniques should be employed. The
SHDN pin should be separated from other high voltage
pins, like V
shutting down the LTC4268-1. If not used, tie SHDN to
V
V
fully charged. The design of a PD must ensure that this
energy is not inadvertently dissipated in the LTC4268-1.
The polarity-protection diodes prevent an accidental short
on the cable from causing damage. However if, V
is shorted to V
is charged, current will fl ow through the parasitic body
diode of the internal MOSFET and may cause permanent
damage to the LTC4268-1.
44
PORTN
OUT
CLASS
of the LTC4268-1 can store signifi cant energy when
. The load capacitor connected between V
pin should be avoided. Include a PCB heat sink
PORTP
PORTP
, V
OUT
, to avoid the possibility of leakage
inside the PD while capacitor C1
PORTP
PORTN
and
In order to minimize switching noise and improve output
load regulation, connect the GND pin of the LTC4268-1
directly to the ground terminal of the V
capacitor, the bottom terminal of the current sense resistor
and the ground terminal of the input capacitor, using a
ground plane with multiple vias. Place the V
immediately adjacent to the V
package. This capacitor carries high di/dt MOSFET gate
drive currents. Use a low ESR ceramic capacitor. Take care
in PCB layout to keep the traces that conduct high switching
currents short, wide and with minimal overall loop area.
These are typically the traces associated with the switches.
This reduces the parasitic inductance and also minimizes
magnetic fi eld radiation. Figure 20 outlines the critical paths.
Keep electric fi eld radiation low by minimizing the length
and area of traces (keep stray capacitances low). The drain
of the primary side MOSFET is the worst offender in this
category. Always use a ground plane under the switcher
circuitry to prevent coupling between PCB planes. Check
that the maximum BV
exceeded due to inductive ringing. This is done by viewing
the MOSFET node voltages with an oscilloscope. If it is
breaking down either choose a higher voltage device, add
a snubber or specify an avalanche-rated MOSFET.
Place the small-signal components away from high
frequency switching nodes. This allows the use of a
pseudo-Kelvin connection for the signal ground, where high
di/dt gate driver currents fl ow out of the IC ground pin in
one direction (to the bottom plate of the V
capacitor) and small-signal currents fl ow in the other
direction. Keep the trace from the feedback divider tap
to the FB pin short to preclude inadvertent pickup. For
applications with multiple switching power converters
connected to the same input supply, make sure that the
input fi lter capacitor for the LTC4268-1 is not shared with
other converters. AC input current from another converter
could cause substantial input voltage ripple and this could
interfere with the LTC4268-1 operation. A few inches of PC
trace or wire (L ≅100nH) between the C
and the actual source V
sharing problems.
DSS
IN
ratings of the MOSFETs are not
is suffi cient to prevent current
CC
and GND pins on the IC
IN
of the LTC4268-1
CC
CC
CC
decoupling
decoupling
capacitor
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