ltc5100 Linear Technology Corporation, ltc5100 Datasheet - Page 47

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ltc5100

Manufacturer Part Number
ltc5100
Description
3.3v, 3.2gbps Vcsel Driver
Manufacturer
Linear Technology Corporation
Datasheet

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APPLICATIO S I FOR ATIO
HIGH SPEED DESIGN AND LAYOUT
Figure 29 and Figure 30 show the schematic and layout of
a minimum component count circuit for standalone op-
eration. The exposed pad of the package is soldered to a
copper pad on top of the board, and nine vias couple this
pad to the ground plane. The four V
SDA
V
SCL
SS
Figure 30. Layout of the Minimum Component Count Circuit Using 0402 Passive Components
EEPROM
V
U
+TX_DATA
–TX_DATA
DD
ENABLE
+ 3.3V
FAULT
V
SS
U
V
NC
CC
Z
Figure 29. Schematic of a Minimum Component Count Circuit
O
= 50
L1
W
FERRITE
SS
BEAD
pins (Pins 1, 4, 9,
SOT23 PACKAGE
IN
IN
V
V
+
U
SS
SS
1
2
3
4
EEPROM
NC
V
24LC00
CC
V
IN
IN
V
4
1
2
3
SS
SS
16
SDA
SCL
5
V
+
SS
FAULT
V
DD
16
5
15
6
PROGRAMMING
SDA
EN
LTC5100
15
6
PADS
and 12) have webs of copper connecting them to the cen-
tral pad to reduce ground inductance. The laser modula-
tion current returns to the ground plane primarily through
the exposed pad. Any measures that reduce the induc-
tance from the pad to the ground plane improve the modu-
lation waveforms and reduce RFI.
14
7
SRC
SCL V
14
7
13
DD(HS)
8
MD
12
11
10
9
13
8
MODA
MODB
V
V
C3
10nF
V
V
SS
SS
MODA
MODB
SS
SS
12
11
10
9
50
FIBER
R1
Z
O
= 50
C1
R1
C3
L1
10nF
C1
5100 F30
5100 F29
LTC5100
sn5100 5100fs
47

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