s29as008j Meet Spansion Inc., s29as008j Datasheet - Page 22

• Manufacturer Part Number: s29as008j
• Description: 8 Megabit 1 M X 8-bit/512 K X 16-bit Cmos 1.8 Volt-only Boot Sector Flash Memory
• Manufacturer: Meet Spansion Inc.

7.14
22
7.14.1
7.14.2
7.14.3
7.14.4
Hardware Data Protection
Low V
Write Pulse Glitch Protection
Logical Inhibit
Power-Up Write Inhibit
The command sequence requirement of unlock cycles for programming or erasing provides data protection
against inadvertent writes (refer to
hardware data protection measures prevent accidental erasure or programming, which might otherwise be
caused by spurious system level signals during V
noise.
When V
power-up and power-down. The command register and all internal program/erase circuits are disabled, and
the device resets. Subsequent writes are ignored until V
proper signals to the control pins to prevent unintentional writes when V
Noise pulses of less than 5 ns (typical) on OE#, CE# or WE# do not initiate a write cycle.
Write cycles are inhibited by holding any one of OE# = V
CE# and WE# must be a logical zero (V
If WE# = CE# = V
edge of WE#. The internal state machine is automatically reset to reading array data on power-up.
CC
CC
Write Inhibit
is less than V
IL
and OE# = V
D a t a
LKO
, the device does not accept any write cycles. This protects data during V
IH
S h e e t
Table 11.1 on page 33
during power up, the device does not accept commands on the rising
S29AS008J
IL
) while OE# is a logical one (V
( A d v a n c e
CC
power-up and power-down transitions, or from system
CC
IL
, CE# = V
for command definitions). In addition, the following
is greater than V
I n f o r m a t i o n )
IH
or WE# = V
CC
IH
).
LKO
is greater than V
S29AS008J_00_03 June 6, 2008
. The system must provide the
IH
. To initiate a write cycle,
LKO
.
CC