sg2567udr212851hc ETC-unknow, sg2567udr212851hc Datasheet - Page 5

• Manufacturer Part Number: sg2567udr212851hc
• Description: Dram Module Ddr2 Sdram 2gbyte 240udimm
• Manufacturer: ETC-unknow

Pin Description Table (Contd.)
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Symbol
A0~A9,
A10/AP,
A11~A13
DQ0~DQ63
CB0~CB7
DQS0~DQS8
DQS0#~DQS8#
DM0~DM8
SA0~SA2
SDA
SCL
V
V
V
V
V
NC
DU
DD
SS
REF
DDQ
DDSPD
Type
SSTL_18
SSTL_18
SSTL_18
SSTL_18
SSTL_18
LVTTL
LVTTL
LVTTL
Supply
Supply
Supply
Supply
Supply
-
-
Polarity
-
-
Positive Edge
Negative Edge
Active High
-
-
-
-
-
-
-
-
-
-
Function
During a Bank Activate command cycle, A0-A13 defines the row address (RA0-RA13)
when sampled at the rising clock edge.
During a Read or Write command cycle, A0-A9 defines the column address (CA0-CA9)
when sampled at the rising clock edge. In addition to the column address, A10/AP is used
to invoke autoprecharge operation at the end of the burst read or write cycle. If AP is high,
autoprecharge is selected and BA0~BA2 defines the bank to be precharged. If AP is low,
autoprecharge is disabled.
During a Precharge command cycle, A10/AP is used in conjunction with BA0~BA2 to con-
trol which bank(s) to precharge. If AP is high, all banks will be precharged regardless of
the state of BA0~BA2. If AP is low, BA0~BA2 are used to define which bank to precharge.
The address inputs also provide the op-code during Mode Register Set commands.
Data and Check Bit Input/Output pins.
SDRAM differential data strobe for input and output data.
SDRAM differential data strobe for input and output data.
DM is an input mask signal for write data. Input data is masked when DM is sampled high
coincident with that input data during a write access. DM is sampled on both edges of
DQS. Although DM pins are input only, the DM loading matches the DQ/DQS loading.
Slave Address Select for EEPROM. These pins are used to configure the presence-detect
device.
Serial Bus Data Line for EEPROM. SDA is a bidirectional pin used to transfer addresses
and data into and out of the presence-detect portion of the module. A resistor must be
connected from the SDA bus line to V
Serial Bus Clock for EEPROM. SCL is used to synchronize the presence-detect data
transfer to and from the module. A resistor may be connected from the SCL bus line to
V
SDRAM positive power supply. 1.8V±0.1V
Power supply return (ground).
SDRAM I/O reference supply.
SDRAM I/O Driver positive power supply. 1.8V±0.1V
Serial EEPROM positive power supply (wired to a separate power pin at the connector
which supports operation from 1.7V to 3.6V).
No Connect.
Do not use.
DDSPD
to act as pull up on the system board.
SG2567UDR212851UU
DDSPD
to act as pull up on the system board.
March 17, 2008
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