s908ab32ag0cfue Freescale Semiconductor, Inc, s908ab32ag0cfue Datasheet - Page 212

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s908ab32ag0cfue

Manufacturer Part Number
s908ab32ag0cfue
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Timer Interface Module B (TIMB)
12.10.2 TIMB Counter Registers
Technical Data
212
NOTE:
Address:
PS[2:0] — Prescaler Select Bits
The two read-only TIMB counter registers contain the high and low bytes
of the value in the TIMB counter. Reading the high byte (TBCNTH)
latches the contents of the low byte (TBCNTL) into a buffer. Subsequent
reads of TBCNTH do not affect the latched TBCNTL value until TBCNTL
is read. Reset clears the TIMB counter registers. Setting the TIMB reset
bit (TRST) also clears the TIMB counter registers.
If you read TBCNTH during a break interrupt, be sure to unlatch TBCNTL
by reading TBCNTL before exiting the break interrupt. Otherwise,
TBCNTL retains the value latched during the break.
Reset:
Read:
Write:
PS2
These read/write bits select either the PTD4/TBCLK pin or one of the
seven prescaler outputs as the input to the TIMB counter as
Table 12-2
0
0
0
0
1
1
1
1
Figure 12-5. TIMB Counter Register High (TBCNTH)
$0041
Bit 15
Bit 7
0
Timer Interface Module B (TIMB)
PS1
0
0
1
1
0
0
1
1
shows. Reset clears the PS[2:0] bits.
= Unimplemented
14
6
0
PS0
Table 12-2. Prescaler Selection
0
1
0
1
0
1
0
1
13
5
0
12
4
0
Internal Bus Clock ÷1
Internal Bus Clock ÷ 2
Internal Bus Clock ÷ 4
Internal Bus Clock ÷ 8
Internal Bus Clock ÷ 16
Internal Bus Clock ÷ 32
Internal Bus Clock ÷ 64
TIM Clock Source
11
PTD4/TBCLK
3
0
MC68HC908AB32
Freescale Semiconductor
10
2
0
9
1
0
Rev. 1.1
Bit 0
Bit 8
0

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