ad7894ar-3reel Analog Devices, Inc., ad7894ar-3reel Datasheet
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ad7894ar-3reel
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ad7894ar-3reel Summary of contents
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... The part provides high speed serial data and serial clock lines allowing for an easy, two-wire serial interface arrangement. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 AD7894 V DD 14-BIT ADC OUTPUT REGISTER SCLK SDATA © Analog Devices, Inc., 1998 ...
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AD7894–SPECIFICATIONS Parameter 2 DYNAMIC PERFORMANCE 3 Signal to (Noise + Distortion) Ratio @ + MIN MAX 3 Total Harmonic Distortion (THD) 3 Peak Harmonic or Spurious Noise 3 Intermodulation Distortion (IMD) 2nd Order Terms 3rd Order ...
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Parameter POWER REQUIREMENTS Power Dissipation Power-Down Mode MIN MAX Power Dissipation MIN MAX NOTES 1 Temperature ranges are as follows Versions: – +85 ...
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... Model Range AD7894AR-10 – +85 C AD7894BR-10 – +85 C AD7894AR-3 – +85 C AD7894BR-3 – +85 C AD7894AR-2 – +85 C Pin Pin No. Mnemonic Description 1 REF IN Voltage Reference Input. An external reference source should be connected to this pin to provide the reference voltage for the AD7894’s conversion process. The REF IN input is buffered on-chip. The nominal reference voltage for correct operation of the AD7894 is +2 ...
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TERMINOLOGY Signal to (Noise + Distortion) Ratio This is the measured ratio of signal to (noise + distortion) at the output of the A/D converter. The signal is the rms amplitude of the fundamental. Noise is the rms sum of ...
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AD7894 CONVERTER DETAILS The AD7894 is a fast, 14-bit single supply A/D converter. It provides the user with signal scaling, track/hold, A/D converter and serial interface logic functions on a single chip. The A/D converter section of the AD7894 consists ...
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Track/Hold Section The track/hold amplifier on the analog input of the AD7894 allows the ADC to accurately convert an input sine wave of full- scale amplitude to 14-bit accuracy. The input bandwidth of the track/hold is greater than the Nyquist ...
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AD7894 CONVST BUSY SCLK PART CONVERSION WAKES IS INITIATED; UP TRACK/HOLD GOES INTO Figure 4. Mode 2 Timing Diagram Where Automatic Sleep Function is Initiated t 2 SCLK (I/P) THREE-STATE DOUT (O/P) Mode 2 Operation (Auto Sleep After Conversion) The ...
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CONVST, the AD7894 will continue to operate correctly with the output shift register being reset on the falling edge of CONVST. However, the SCLK line must be low when CONVST goes low in order to reset the output shift register ...
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AD7894 AD7894 to ADSP-2101/5 Interface An interface circuit between the AD7894 and the ADSP-2101/5 DSP processor is shown in Figure 8. In the interface shown, the RFS1 output from the ADSP-2101/5s SPORT1 serial port is used to gate the serial ...
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Dynamic Performance (Mode 1 Only) With a conversion time the AD7894 is ideal for wide bandwidth signal processing applications. These applications require information on the ADC’s effect on the spectral con- tent of the input signal. Signal ...
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AD7894 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 8-Lead Narrow Body SOIC (SO-8) 0.1968 (5.00) 0.1890 (4.80 0.1574 (4.00) 0.2440 (6.20 0.1497 (3.80) 0.2284 (5.80) PIN 1 0.0688 (1.75) 0.0196 (0.50) 0.0098 (0.25) 0.0532 (1.35) ...