ad7523kn Intersil Corporation, ad7523kn Datasheet - Page 5

• Manufacturer Part Number: ad7523kn
• Description: 8-bit, Multiplying D/a Converters
• Manufacturer: Intersil Corporation

Unipolar Binary Operation - AD7533 (10-Bit DAC)
The circuit configuration for operating the AD7533 in
unipolar mode is shown in Figure 2. With positive and
negative V
multiplication. The “Digital Input Code/Analog Output Value”
table for unipolar mode is given in Table 2.
NOTES:
Zero Offset Adjustment
Gain Adjustment
1. Connect all digital inputs to GND.
2. Adjust the offset zero adjust trimpot of the output
1. Connect all digital inputs to V+.
2. Monitor V
1. V
2. Nominal Full Scale for the circuit of Figure 2 is given by:
3. Nominal LSB magnitude for the circuit of Figure 2 is given by:
operational amplifier for 0V 1mV (Max) at V
LSB
FS
OUT
DIGITAL INPUT
TABLE 2. UNlPOLAR BINARY CODE - AD7533
1111111111
1000000001
1000000000
0111111111
0000000001
0000000000
=
MSB LSB
=
as shown in the Functional Diagram.
–
REF
V REF
V REF
OUT
values the circuit is capable of 2-Quadrant
1023
------------ -
1024
------------ -
1024
for a -V
1
INPUTS
.
.
DATA
REF
R6 10M
FIGURE 3. BIPOLAR OPERATION (4-QUADRANT MULTIPLICATION)
NOMINAL ANALOG OUTPUT
–
–
–
–
(1 - 1/2
–
V
V
V
V
–
V
REF
REF
V REF
REF
REF
MSB
LSB
REF
V
1023
------------ -
1024
------------ -
1024
------------ -
1024
------------ -
1024
513
511
10
------------ -
1024
REF
1
R1
4
13
------------ -
1024
(NOTE 1)
512
0
AD7523/
) reading.
AD7533
10V
15
3
=
=
+15V
0
14
–
16
OUT
V
-------------- -
1
2
CR2
AD7523, AD7533
REF
2
I
I
R
OUT2
OUT1
.
FEEDBACK
6
-
+
10-12
R4 5K
Bipolar (Offset Binary) Operation - AD7523
The circuit configuration for operating the AD7523 in the
bipolar mode is given in Figure 3. Using offset binary digital
input codes and positive and negative reference voltage
values, Four-Quadrant multiplication can be realized. The
“Digital Input Code/Analog Output Value” table for bipolar
mode is given in Table 3.)
A “Logic 1” input at any digital input forces the corresponding
ladder switch to steer the bit current to I
0” input forces the bit current to I
I
another. The current amplifier at I
of I
output sums the two currents. This configuration doubles the
output range. The difference current resulting at zero offset
binary code, (MSB = “Logic 1”, all other bits = “Logic 0”), is
corrected by suing an external resistor, (10M ), from V
to I
NOTE:
OUT1
3. To increase V
4. To decrease V
1.
OUT2
OUT2
250 ) in the I
250 ) between the reference voltage and the V
terminal.
TABLE 3. BlPOLAR (OFFSET BINARY) CODE - AD7523
1 LSB
R3 5K
and I
DIGITAL INPUT
(Figure 3).
current and the transconductance amplifier at I
MSB LSB
11111111
10000001
10000000
01111111
00000001
00000000
=
R2
OUT2
CR1
2
–
7
OUT
OUT1
OUT
V REF
bus currents are complements of one
, connect a series resistor, R2, (0 to
6
-
+
, connect a series resistor, R1, (0 to
amplifier feedback loop.
=
--------- - V
128
1
0
+V REF
+V REF
+V REF
–
–
OUT2
V REF
V REF
OUT2
V
REF
ANALOG OUTPUT
OUT
bus. For any code the
--------- -
128
127
--------- -
128
128
--------- -
128
127
--------- -
128
--------- -
128
changes the polarity
1
1
OUT1
.
bus. A “Logic
OUT
REF
REF